PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 206

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PIC18F85K22-I/PT

Manufacturer Part Number
PIC18F85K22-I/PT
Description
IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F85K22-I/PT

Controller Family/series
PIC18
No. Of I/o's
69
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
64MHz
No. Of Timers
8
Core Size
8 Bit
Program Memory Size
32KB
Core Processor
PIC
Speed
64MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC18F85K22-I/PT
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Microchip Technology
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PIC18F87K22 FAMILY
14.8.4
When Timer1 Gate Single Pulse mode is enabled, it is
possible to capture a single pulse gate event. Timer1
Gate Single Pulse mode is enabled by setting the
T1GSPM bit (T1GCON<4>) and the T1GGO/T1DONE
bit (T1GCON<3>). The Timer1 will be fully enabled on
the next incrementing edge.
On the next trailing edge of the pulse, the T1GGO/
T1DONE bit will automatically be cleared. No other
gate events will be allowed to increment Timer1 until
the T1GGO/T1DONE bit is once again set in software.
FIGURE 14-6:
DS39960D-page 206
TMR1GE
T1GSPM
T1DONE
T1GPOL
T1GGO/
T1GVAL
RTCCIF
T1G_IN
Timer1
T1CKI
TIMER1 GATE SINGLE PULSE
MODE
TIMER1 GATE SINGLE PULSE MODE
Cleared by Software
N
Counting Enabled on
Rising Edge of T1G
Set by Software
N + 1
Clearing the T1GSPM bit of the T1GCON register will
also clear the T1GGO/T1DONE bit. (For timing details,
see
Simultaneously enabling the Toggle and Single Pulse
modes will permit both sections to work together. This
allows the cycle times on the Timer1 gate source to be
measured. (For timing details, see
14.8.5
When the Timer1 gate value status is utilized, it is
possible to read the most current level of the gate
control value. The value is stored in the T1GVAL bit
(T1GCON<2>). This bit is valid even when the Timer1
gate is not enabled (TMR1GE bit is cleared).
Figure
Set by Hardware on
Falling Edge of T1GVAL
Cleared by Hardware on
Falling Edge of T1GVAL
14-6.)
TIMER1 GATE VALUE STATUS
N + 2
 2009-2011 Microchip Technology Inc.
Figure
Cleared by
Software
14-7.)

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