PIC18F85K22-I/PT Microchip Technology, PIC18F85K22-I/PT Datasheet - Page 104

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PIC18F85K22-I/PT

Manufacturer Part Number
PIC18F85K22-I/PT
Description
IC, 8BIT MCU, PIC18F, 64MHZ, TQFP-80
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F85K22-I/PT

Controller Family/series
PIC18
No. Of I/o's
69
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
64MHz
No. Of Timers
8
Core Size
8 Bit
Program Memory Size
32KB
Core Processor
PIC
Speed
64MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC18F87K22 FAMILY
6.3.5
The STATUS register, shown in
the arithmetic status of the ALU. The STATUS register
can be the operand for any instruction, as with any
other register. If the STATUS register is the destination
for an instruction that affects the Z, DC, C, OV or N bits,
the write to these five bits is disabled.
These bits are set or cleared according to the device
logic. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended. For example, CLRF STATUS will set the Z bit
but leave the other bits unchanged. The STATUS
register then reads back as ‘000u u1uu’.
REGISTER 6-2:
DS39960D-page 104
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
2:
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second
operand.
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second
operand.
STATUS REGISTER
Unimplemented: Read as ‘0’
N: Negative bit
This bit is used for signed arithmetic (2’s complement). It indicates whether the result was negative
(ALU MSB = 1).
1 = Result was negative
0 = Result was positive
OV: Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the seven-bit
magnitude which causes the sign bit (bit 7) to change state.
1 = Overflow occurred for signed arithmetic (in this arithmetic operation)
0 = No overflow occurred
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit Carry/Borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry-out from the 4th low-order bit of the result occurred
0 = No carry-out from the 4th low-order bit of the result
C: Carry/Borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
U-0
STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
Register
(2)
U-0
6-2, contains
(1)
R/W-x
N
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
It is recommended, therefore, that only BCF, BSF,
SWAPF, MOVFF and MOVWF instructions be used to
alter the STATUS register because these instructions
do not affect the Z, C, DC, OV or N bits in the STATUS
register.
For other instructions not affecting any Status bits, see
the instruction set summaries in
Table
OV
Note:
29-3.
The C and DC bits operate, in subtraction,
as borrow and digit borrow bits, respectively.
R/W-x
Z
 2009-2011 Microchip Technology Inc.
x = Bit is unknown
R/W-x
DC
(1)
Table 29-2
R/W-x
C
(2)
bit 0
and

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