MMA5206WR2 Freescale Semiconductor, MMA5206WR2 Datasheet - Page 57

• Manufacturer Part Number: MMA5206WR2
• Description: IC ACCELER 60G X-AXIS 16QFN
• Manufacturer: Freescale Semiconductor

Specifications of MMA5206WR2

• Sensing Axis: X
• Acceleration: 60 g
• Sensitivity: 0.125 g/LSB
• Package / Case: QFN-16
• Supply Voltage (max): 25 V
• Supply Current: 4 mA to 8 mA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 20. SPI Command/Response Summary
6.1
mand transmitted. If an incorrect DPM Entry command is received, DPM is locked out, and cannot be activated until the device
is reset.
been received correctly. Upon completion of a successful transfer DPM is activated. Once activated, the device will remain in
DPM until a reset condition occurs.
6.2
Sensors
Freescale Semiconductor
(Subsequent Message Response)
DPM can be activated at any time during the operation of the device, provided the SPI DPM Entry command is the first com-
The device responds to the DPM Entry command with the logical complement of the received data as confirmation that it has
Following successful transmission of the DPM Entry command, DPM operations may be completed in any order.
Table 20
Invalid Command Response
(Waiting for SPI DPM Entry)
Invalid Command Response
Acceleration Data Read
Register Pointer Write
Register Pointer Read
Parity Fault Response
Register Data Write
Register Data Read
DPM Entry
DPM Command/Response Summary
SPI DPM Entry
Command
provides a summary of SPI commands and responses.
D
D
D
D
D
D
D
D
D
D
D
D
Pin
D
D
D
D
D
D
D
D
D
D
D
D
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
D15 D14 D13
d[1
5]
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
X
X
1
d[1
4]
X
X
0
1
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
0
D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
D[13] D[12] D[11]
D[13] D[12] D[11]
d[13] d[12] d[11] d[10] d[9] d[8] d[7] d[6] d[5] d[4] d[3] d[2] d[1] d[0]
X
X
1
0
0
1
0
1
0
1
0
1
1
0
1
0
D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
D12
X
X
0
1
0
1
0
1
1
0
1
0
0
1
0
D11
X
X
0
1
1
0
0
0
1
0
0
0
0
1
No Response (all 0s) - DPM Entry Locked Out
No Response (all 0s) - DPM Entry Locked Out
0
No Response (all 0s) - DPM Entry Locked Out
D10
P=0
P=1
P=1
...
...
0
1
1
P
P
0
P
P
P
X
X
0
D[x]
D[x]
D9
D9
P
P
X
X
1
0
0
0
0
1
0
1
0
1
D8
D8
Bit
X
X
X
X
X
X
1
0
1
1
0
0
0
1
No Response (all 0s) - DPM Entry Locked Out
D7
A7
A7
D7
A7
D7
D7
0
1
0
X
X
0
X
X
1
Not SPI DPM Entry Command
D6
A6
A6
D6
A6
D6
D6
1
0
0
X
X
0
X
X
1
D5
D5
D5
D5
A5
A5
A5
X
X
X
X
0
1
0
0
1
D4
D4
D4
D4
A4
A4
A4
X
X
X
X
1
0
0
0
1
D3
A3
A3
D3
A3
D3
D3
X
X
X
X
1
0
0
0
1
MMA52xxWR
D2
A2
A2
D2
A2
D2
D2
X
X
X
X
1
0
0
0
1
D1
A1
A1
D1
A1
D1
D1
X
X
X
X
0
1
0
0
1
D0
A0
A0
D0
A0
D0
D0
X
X
X
X
0
1
0
0
1
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