MMA5206WR2 Freescale Semiconductor, MMA5206WR2 Datasheet - Page 47

• Manufacturer Part Number: MMA5206WR2
• Description: IC ACCELER 60G X-AXIS 16QFN
• Manufacturer: Freescale Semiconductor

Specifications of MMA5206WR2

• Sensing Axis: X
• Acceleration: 60 g
• Sensitivity: 0.125 g/LSB
• Package / Case: QFN-16
• Supply Voltage (max): 25 V
• Supply Current: 4 mA to 8 mA
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.5.2
TRANS_MD[1:0] bits to “Synchronous Double Sample Rate Mode”. The LATENCY bit does not affect operation in this mode.
grammed in TIMESLOTA[9:0], relative to t
grammed in TIMESLOTA[9:0], relative to t
the time programmed in TIMESLOTB[9:0], relative to t
programmed in TIMESLOTB[9:0], relative to t
TIMESLOTB[9:0]. Identical data is transmitted in both Time slots, including the 10-bit resolution Raw Offset and Self-Test Data
in Field 9, D27 though D31 if enabled.
Note: In the event that the programmed values in TIMESLOTA
Sensors
Freescale Semiconductor
The device can be programmed to respond in Synchronous Double Sample Rate Mode with minimum latency by setting the
In Synchronous Double Sample Rate Mode, the most recent interpolated acceleration data sample is latched at the time pro-
When Synchronous Double Sample Rate Mode is enabled, PSI5 Initialization data is transmitted in both TIMESLOTA[9:0] and
transmitted in TIMESLOTB
Synchronous Double Sample Rate Mode
≤t
LAT_INTERP
+t
DATASETUP_double
[9:0]
≤t
Figure 37. Synchronous Double Sample Rate Mode
LAT_INTERP
.
TRIG
TRIG
+t
TRIG
DATASETUP_double
. In addition, the most recent interpolated acceleration data sample is latched at
(rising edge of Sync Pulse). This data is transmitted starting at the time pro-
.
TRIG
(rising edge of Sync Pulse) This data is transmitted starting at the time
[9:0]
and TIMESLOTB
t
TIMESLOTB
t
TIMESLOTA
[9:0]
result in a conflict, no data will be
MMA52xxWR
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