LFXP6C-4TN144I Lattice, LFXP6C-4TN144I Datasheet - Page 301
LFXP6C-4TN144I
Manufacturer Part Number
LFXP6C-4TN144I
Description
FPGA - Field Programmable Gate Array 5.8K LUTs 100 IO 1.8 /2.5/3.3V -4 Spd I
Manufacturer
Lattice
Specifications of LFXP6C-4TN144I
Number Of Programmable I/os
100
Data Ram Size
73728
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
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Quantity
Price
Company:
Part Number:
LFXP6C-4TN144I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Figure 13-1. Programming Block Diagram
Configuration Pins
The LatticeXP supports two types of sysCONFIG pins, dedicated and dual-purpose. The dual-purpose pins are
available as extra I/O pins if they are not used for configuration.
Two configuration mode pins, along with a programmable option, control the dual-purpose configuration pins. The
configuration mode pins (CFG) are generally hard wired on the PCB and determine which configuration mode will
be used; the programmable option is accessed via preferences in Lattice ispLEVER
source file attributes, and allows the user to protect the configuration pins from accidental use by the user or the
place-and-route software. The LatticeXP devices also support ispJTAG for configuration, including transparent
readback, and for JTAG testing. The following sections describe the functionality of the sysCONFIG and JTAG pins.
Note that JTAG and ispJTAG will be used interchangeably in this document. Table 13-1 is provided for reference.
Table 13-1. Configuration Pins for the LatticeXP Device
CFG[1:0]
PROGRAMN
INITN
DONE
CCLK
DIN
DOUT/CSON
CSN
CS1N
WRITEN
BUSY
D[0:7]
TDI
Pin Name
Input, weak pull-up
Input, weak pull-up
Bi-Directional Open Drain, weak pull-up
Bi-Directional Open Drain with weak pull-up or Active Drive
Input or Output
Input, weak pull-up
Output
Input, weak pull-up
Input, weak pull-up
Input, weak pull-up
Output, tri-state, weak pull-up
Input or Output
Input, weak pull-up
Port
Mode
Memory Space
Program in seconds
ispJTAG 1149.1 TAP
Flash Memory
JTAG 1532
Space
(Slave Parallel Only)
I/O Type
microseconds
Program in
13-2
SDM
LatticeXP sysCONFIG Usage Guide
Master/Slave Serial
sysCONFIG Port
SRAM Memory
Slave Parallel
Space
Dual-Purpose
Dual-Purpose
Dual-Purpose
Dual-Purpose
Dual-Purpose
Dual-Purpose
Dual-Purpose
Dedicated
Dedicated
Dedicated
Dedicated
Dedicated
Pin Type
Program in
milliseconds
JTAG
®
design software, or as HDL
,
Serial or Parallel
Mode Used
Parallel
Parallel
Parallel
Parallel
Parallel
Serial
All
All
All
All
All
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