LFEC3E-3QN208C Lattice, LFEC3E-3QN208C Datasheet - Page 62

• Manufacturer Part Number: LFEC3E-3QN208C
• Description: FPGA - Field Programmable Gate Array 3.1K LUTs
• Manufacturer: Lattice

Specifications of LFEC3E-3QN208C

• Number Of Macrocells: 3100
• Number Of Programmable I/os: 145
• Data Ram Size: 56320
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 3-12. sysCONFIG Parallel Port Read Cycle
Figure 3-13. sysCONFIG Parallel Port Write Cycle
WRITEN
WRITEN
1. In Master Parallel Mode the FPGA provides CCLK. In Slave Parallel Mode the external device provides CCLK.
1. In Master Parallel Mode the FPGA provides CCLK. In Slave Parallel Mode the external device provides CCLK.
CCLK
CS1N
BUSY
D[0:7]
CCLK
CS1N
BUSY
D[0:7]
CSN
CSN
1
1
t
SUCBDI
t
t
t
t
SUWD
SUCS
SUWD
SUCS
Byte 0
Byte 0
t
t
BSCL
BSCL
3-26
Byte 1
Byte 1
t
t
CORD
HCBDI
Byte 2
t
t
DCB
DCB
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
t
Byte 2
t
BSCYC
t
BSCYC
t
BSCH
BSCH
Byte n
Byte n
t
HCS
t
t
t
HCS
HWD
HWD