AGLP060V2-CSG289 Actel, AGLP060V2-CSG289 Datasheet - Page 41

• Manufacturer Part Number: AGLP060V2-CSG289
• Description: FPGA - Field Programmable Gate Array 60K System Gates
• Manufacturer: Actel

Specifications of AGLP060V2-CSG289

• Processor Series: AGLP060
• Core: IP Core
• Number Of Macrocells: 512
• Maximum Operating Frequency: 250 MHz
• Number Of Programmable I/os: 4
• Data Ram Size: 4608 bit
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGLP-Eval-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, Flashpro 4, Flashpro 3, Flashpro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Number Of Gates: 60 K
• Package / Case: CSP-289
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-34 • Minimum and Maximum DC Input and Output Levels
Figure 2-7 • AC Loading
Table 2-35 • AC Waveforms, Measuring Points, and Capacitive Loads
3.3 V LVTTL /
3.3 V LVCMOS
Drive
Strength
2 mA
4 mA
6 mA
8 mA
12 mA
16 mA
Notes:
1. I
2. I
3. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
4. Currents are measured at 85°C junction temperature.
5. Software default selection highlighted in gray.
Input Low (V)
0
*
Measuring point = Vtrip. See
larger when operating outside recommended ranges.
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
Single-Ended I/O Characteristics
3.3 V LVTTL / 3.3 V LVCMOS
Low-Voltage Transistor–Transistor Logic (LVTTL) is a general-purpose standard (EIA/JESD) for 3.3 V
applications. It uses an LVTTL input buffer and push-pull output buffer.
Test Point
Min.
Datapath
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
V
VIL
Max.
0.8
0.8
0.8
0.8
0.8
0.8
V
Table 2-23 on page 2-21
5 pF
Min.
Input High (V)
V
2
2
2
2
2
2
VIH
3.3
Max.
3.6
Enable Path
3.6
3.6
3.6
3.6
3.6
V
Test Point
R = 1 k
Max.
VOL
0.4
0.4
0.4
0.4
0.4
0.4
V
for a complete table of trip points.
R ev i si o n 1 1
Measuring Point* (V)
VOH
Min.
2.4
2.4
2.4
2.4
2.4
2.4
V
R to VCCI for t
R to GND for t
35 pF for t
5 pF for t
mA mA
I
1.4
OL
12
16
2
4
6
8
I
HZ
OH
12
16
2
6
4
8
ZH
/ t
/ t
LZ
IGLOO PLUS Low Power Flash FPGAs
HZ
LZ
ZHS
Max.
mA
I
103
103
/ t
/ t
OSL
25
25
51
51
ZH
ZL
/ t
3
ZL
/ t
/ t
ZLS
/ t
ZHS
ZLS
C
Max.
I
mA
109
109
OSH
LOAD
27
27
54
54
3
5
(pF)
µA
I
10
10
10
10
10
10
IL
1
4
µA
I
10
10
10
10
10
10
IH
2- 27
2
4