A40MX04-PLG44 Actel, A40MX04-PLG44 Datasheet - Page 34
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A40MX04-PLG44
Manufacturer Part Number
A40MX04-PLG44
Description
FPGA - Field Programmable Gate Array 6K System Gates
Manufacturer
Actel
Datasheet
1.A40MX04-PLG44.pdf
(124 pages)
Specifications of A40MX04-PLG44
Processor Series
A40MX04
Core
IP Core
Number Of Macrocells
547
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
69
Delay Time
5.6 ns
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
3 V
Number Of Gates
6000
Package / Case
PLCC-44
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A40MX04-PLG44I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Decode Module Timing
Figure 1-28 • Decode Module Timing
SRAM Timing Characteristics
Figure 1-29 • SRAM Timing Characteristics
Dual-Port SRAM Timing Waveforms
Note: Identical timing for falling edge clock.
Figure 1-30 • 42MX SRAM Write Operation
1 -2 8
40MX and 42MX FPGA Families
A–G, H
WRAD[5:0]
Y
C
D
G
A
B
E
F
WD[7:0]
BLKEN
WCLK
WRAD [5:0]
BLKEN
WEN
WCLK
WD [7:0]
WEN
Write Port
t PLH
50%
H
t
t
t
Valid
Valid
ADSU
WENSU
3 2x8 or 64x4
BENSU
RAM Array
(2 56 Bits)
v6.1
t
RCKHL
t
t
t
ADH
BENH
WENH
t PHL
t
Read Port
RDAD [5:0]
RCKHL
RD [7:0]
RCLK
Y
LEW
REN