A2F200M3F-1FGG256 Actel, A2F200M3F-1FGG256 Datasheet - Page 124
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A2F200M3F-1FGG256
Manufacturer Part Number
A2F200M3F-1FGG256
Description
FPGA - Field Programmable Gate Array 200K System Gates SmartFusion
Manufacturer
Actel
Datasheet
1.A2F500M3G-FGG256.pdf
(192 pages)
Specifications of A2F200M3F-1FGG256
Processor Series
A2F200
Core
ARM Cortex M3
Number Of Logic Blocks
8
Maximum Operating Frequency
120 MHz
Number Of Programmable I/os
117
Data Ram Size
4608 bit
Delay Time
200 ns
Supply Voltage (max)
3.6 V
Supply Current
3 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
200000
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A2F200M3F-1FGG256
Manufacturer:
ACT
Quantity:
36
Company:
Part Number:
A2F200M3F-1FGG256
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
A2F200M3F-1FGG256I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Pin Descriptions
Analog Front-End Pin-Level Function Multiplexing
Table 5-2 • Relationships Between Signals in the Analog Front-End
5- 14
Pin
ABPS0 ADC0_CH1
ABPS1 ADC0_CH2
ABPS2 ADC0_CH5
ABPS3 ADC0_CH6
ABPS4 ADC1_CH1
ABPS5 ADC1_CH2
ABPS6 ADC1_CH5
ABPS7 ADC1_CH6
ABPS8 ADC2_CH1
ABPS9 ADC2_CH2
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
ADC10 ADC2_CH11
ADC11 ADC2_CH12
CM0
CM1
CM2
CM3
CM4
SDD0
SDD1
Notes:
1. ABPSx_IN: Input to active bipolar prescaler channel x.
2. CMx_H/L: Current monitor channel x, high/low side.
3. TMx_IO: Temperature monitor channel x.
4. CMPx_P/N: Comparator channel x, positive/negative input.
5. LVTTLx_IN: LVTTL I/O channel x.
6. SDDMx_OUT: Output from sigma-delta DAC MUX channel x.
7. SDDx_OUT: Direct output from sigma-delta DAC channel x.
ADC0_CH10
ADC0_CH12
ADC1_CH10
ADC1_CH12
ADC2_CH10
ADC0_CH15
ADC1_CH15
ADC0_CH11
ADC1_CH11
ADC0_CH9
ADC1_CH9
ADC2_CH9
ADC0_CH3
ADC0_CH7
ADC1_CH3
ADC1_CH7
ADC2_CH3
Channel
ADC
Table 5-2
(AFE) and how they are multiplexed onto the external package pins. Note that, in general, only one
function is available for those pads that have numerous functions listed. The exclusion to this rule is
when a comparator is used; the ADC can still convert either input side of the comparator.
describes the relationships between the various internal signals found in the analog front-end
Option Prescaler
Dir.-In
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
ABPS0_IN
ABPS1_IN
ABPS2_IN
ABPS3_IN
ABPS4_IN
ABPS5_IN
ABPS6_IN
ABPS7_IN
ABPS8_IN
ABPS9_IN
Current
CM0_H
CM1_H
CM2_H
CM3_H
CM4_H
Mon.
Temp.
Mon.
R e visio n 6
Compar.
CMP1_P
CMP1_N
CMP3_P
CMP3_N
CMP5_P
CMP5_N
CMP7_P
CMP7_N
CMP9_P
CMP9_N
CMP0_P
CMP2_P
CMP4_P
CMP6_P
CMP8_P
LVTTL10_IN
LVTTL11_IN
LVTTL0_IN
LVTTL1_IN SDDM0_OUT
LVTTL2_IN
LVTTL3_IN SDDM1_OUT
LVTTL4_IN
LVTTL5_IN SDDM2_OUT
LVTTL6_IN
LVTTL7_IN SDDM3_OUT
LVTTL8_IN
LVTTL9_IN SDDM4_OUT
LVTTL
SDD MUX
SDD0_OUT
SDD1_OUT
SDD