ATTINY861-20PU Atmel, ATTINY861-20PU Datasheet - Page 46
![Microcontrollers (MCU) 8kB Flash 0.512kB EEPROM 16 I/O Pins](/photos/16/13/161304/pdip20_sml.jpg)
ATTINY861-20PU
Manufacturer Part Number
ATTINY861-20PU
Description
Microcontrollers (MCU) 8kB Flash 0.512kB EEPROM 16 I/O Pins
Manufacturer
Atmel
Specifications of ATTINY861-20PU
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire/SPI/USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRMC320
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Program Memory Type
Flash
Program Memory Size
8 KB
Package / Case
PDIP-20
Controller Family/series
AVR Tiny
Core Size
8 Bit
No. Of I/o's
16
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
20MHz
No. Of Timers
2
Rohs Compliant
Yes
Package
20PDIP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
20 MHz
Ram Size
512 Byte
Operating Temperature
-40 to 85 °C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY861-20PU
Manufacturer:
Atmel
Quantity:
135
Company:
Part Number:
ATTINY861-20PU ES
Manufacturer:
ATMEL
Quantity:
215
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8.3.2
46
ATtiny261/461/861
Code Examples
The following code example shows one assembly and one C function for turning off the WDT.
The example assumes that interrupts are controlled (e.g., by disabling interrupts globally) so that
no interrupts will occur during execution of these functions.
Note:
Assembly Code Example
C Code Example
1. In the same operation, write a logical one to WDCE and WDE. Even though the WDE
2. Within the next four clock cycles, in the same operation, write the WDP bits as desired,
WDT_off:
void WDT_off(void)
{
}
always is set, the WDE must be written to one to start the timed sequence.
but with the WDCE bit cleared. The value written to the WDE bit is irrelevant.
wdr
; Clear WDRF in MCUSR
ldi
out
; Write logical one to WDCE and WDE
; Keep old prescaler setting to prevent unintentional Watchdog Reset
in
ori r16, (1<<WDCE)|(1<<WDE)
out WDTCSR, r16
; Turn off WDT
ldi r16, (0<<WDE)
out WDTCSR, r16
ret
_WDR();
/* Clear WDRF in MCUSR */
MCUSR = 0x00
/* Write logical one to WDCE and WDE */
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Turn off WDT */
WDTCSR = 0x00;
See
“Code Examples” on page
r16, WDTCSR
r16, (0<<WDRF)
MCUSR, r16
6.
2588E–AVR–08/10
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