XRT75R12IB-F Exar Corporation, XRT75R12IB-F Datasheet - Page 86

• Manufacturer Part Number: XRT75R12IB-F
• Description: Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
• Manufacturer: Exar Corporation

Specifications of XRT75R12IB-F

• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: TBGA-420
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 3.135V To 3.465V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: BGA
• No. Of Pins: 420
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Data Rate Max: 51.84Mbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L
A
XRT75R12
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
Each channel contains a dedicated 16 bit PRBS error counter. When enabled this counter will accumulate
PRBS errors (as well as excess zeros and LCVs). The LS byte will "carry" a one over to the MS byte each time
it rolls over from 255 to zero until the MS byte also reaches 255. When both counters reach 255, no further
errors will be accumulated and "all ones" will signify an overflow condition.
The counter can be read while in the active count mode. Either register may be read "on the fly" and the other
byte will be simultaneously transferred into the channel’s Error Holding register. The holding register may then
be read to supply the Host with a correct 16 bit count (as of the instant of reading). With this mechanism, the
Host could rapidly cycle thru reading all twelve counters in order (storing the read byte in scratch RAM) and
then come back and read the second byte from each holding register to form the 16 bit accumulation in the
Host system.
OCATION
DDRESS
0xC-
0xD-
0
0
0xA-
0xB-
0xE-
0xF-
0x0-
0x2-
0x3-
0x4-
0x5-
0x6-
0x7-
0x8-
X
X
1-
9-
B
Msb
R/W
IT
7
T
APST
APST
ABLE
CIE
CIE
T
0
ABLE
47: XRT75R12 R
IER10
IER11
IER0
IER1
IER2
IER3
IER4
IER5
IER6
IER7
IER8
IER9
CIS
CIS
48: E
1
B
R/W
IT
6
RROR
ISR10
ISR11
ISR0
ISR1
ISR2
ISR3
ISR4
ISR5
ISR6
ISR7
ISR8
ISR9
2
C
OUNTER
B
R/W
EGISTER
AS10
AS11
AS0
AS1
AS2
AS3
AS4
AS5
AS6
AS7
AS8
AS9
IT
3
5
H
OLDING
TC10
TC11
MAP
TC0
TC1
TC2
TC3
TC4
TC5
TC6
TC7
TC8
TC9
4
B
R/W
SHOWING
IT
R
RC10
RC11
4
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
RC8
RC9
EGISTER
5
83
E
CC10
CC11
CC0
CC1
CC2
CC3
CC4
CC5
CC6
CC7
CC8
CC9
RROR
- C
6
B
R/W
IT
HANNEL N
3
C
JA10
JA11
JA0
JA1
JA2
JA3
JA4
JA5
JA6
JA7
JA8
JA9
OUNTER
7
APSR
APSR
A
8
DDRESS
B
H
R/W
IT
OLDING
2
9
EM10
EM11
EM0
EM1
EM2
EM3
EM4
EM5
EM6
EM7
EM8
EM9
L
A
OCATION
R
EGISTERS
B
R/W
EL10
EL11
IT
EL0
EL1
EL2
EL3
EL4
EL5
EL6
EL7
EL8
EL9
B
1
= 0
(EH_
XM
EH10
EH11
EH0
EH1
EH2
EH3
EH4
EH5
EH6
EH7
EH8
EH9
C
C
N
REV. 1.0.4
Ls bit
)
B
R/W
IT
D E F
0
PN VN