XRT75R12IB-F Exar Corporation, XRT75R12IB-F Datasheet - Page 71

Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C

XRT75R12IB-F

Manufacturer Part Number
XRT75R12IB-F
Description
Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT75R12IB-F

Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
TBGA-420
Ic Interface Type
Parallel, Serial
Supply Voltage Range
3.135V To 3.465V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
BGA
No. Of Pins
420
Filter Terminals
SMD
Rohs Compliant
Yes
Data Rate Max
51.84Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REV. 1.0.4
B
IT
7 - 4
N
UMBER
3
2
1
0
T
ABLE
Change of LOL Con-
32: S
Change of FL Con-
dition Interrupt Sta-
dition Interrupt Sta-
Condition Interrupt
Condition Interrupt
Change of DMO
Change of LOS
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
Reserved
OURCE
Status
Status
N
tus
tus
AME
L
EVEL
I
NTERRUPT
RUR
RUR
RUR
RUR
T
YPE
Change of FL (FIFO Limit Alarm) Condition Interrupt Status - Ch n:
This RESET-upon-READ bit-field indicates whether or not the Change of FL
Condition Interrupt (for Channel n) has occurred since the last read of this
register.
0 - Indicates that the Change of FL Condition Interrupt has NOT occurred
since the last read of this register.
1 - Indicates that the Change of FL Condition Interrupt has occurred since
the last read of this register.
N
Change of Receive LOL (Loss of Lock) Condition Interrupt Status - Ch
n:
This RESET-upon-READ bit-field indicates whether or not the Change of
Receive LOL Condition Interrupt (for Channel n) has occurred since the last
read of this register.
0 - Indicates that the Change of Receive LOL Condition Interrupt has NOT
occurred since the last read of this register.
1 - Indicates that the Change of Receive LOL Condition Interrupt has
occurred since the last read of this register.
N
Change of Receive LOS (Loss of Signal) Defect Condition Interrupt
Status: Ch_n
This RESET-upon-READ bit-field indicates whether or not the Change of the
Receive LOS Defect Condition Interrupt (for Channel n) has occurred since
the last read of this register.
0 - Indicates that the Change of the Receive LOS Defect Condition Interrupt
has NOT occurred since the last read of this register.
1 - Indicates that the Change of the Receive LOS Defect Condition Interrupt
has occurred since the last read of this register.
N
Change of Transmit DMO (Drive Monitor Output) Condition Interrupt
Status - Ch n:
This RESET-upon-READ bit-field indicates whether or not the Change of the
Transmit DMO Condition Interrupt (for Channel n) has occurred since the
last read of this register.
0 - Indicates that the Change of the Transmit DMO Condition Interrupt has
NOT occurred since the last read of this register.
1 - Indicates that the Change of the Transmit DMO Condition Interrupt has
occurred since the last read of this register.
N
(n = [0:11] &
OTE
OTE
OTE
OTE
S
TATUS
: The user can determine the current state of the FIFO Alarm condition
: The user can determine the current state of the Receive LOL Defect
: The user can determine the current state of the Receive LOS Defect
: The user can determine the current state of the Transmit DMO
by reading out the contents of Bit 3 (FL Alarm Declared) within the
Alarm Status Register.(n)
condition by reading out the contents of Bit 2 (Receive LOL Defect
Declared) within the Alarm Status Register.(n)
condition by reading out the contents of Bit 1 (Receive LOS Defect
Declared) within the Alarm Status Register.(n)
Condition by reading out the contents of Bit 0 (Transmit DMO
Condition) within the Alarm Status Register.(n)
R
68
EGISTER
M
= 0-5 & 8-D)
- C
HANNEL N
D
ESCRIPTION
A
DDRESS
L
OCATION
XRT75R12
= 0
XM
2

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