MCIMX513DJM8CR2 Freescale Semiconductor, MCIMX513DJM8CR2 Datasheet - Page 141

• Manufacturer Part Number: MCIMX513DJM8CR2
• Description: IC MPU I.MX51 529MABGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of MCIMX513DJM8CR2

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 800MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

4.7.17
This section describes the electrical parameters of the USB OTG port and USB HOST ports. For on-chip
USB PHY parameters see
4.7.17.1 USB Serial Interface
In order to support four serial different interfaces, the USB serial transceiver can be configured to operate
in one of four modes:
The USB controller does not support ULPI Serial mode. Only the legacy serial mode is supported.
Table 111
Table 112
Freescale Semiconductor
2
tx_enable
tx_enable
Reserved
•
•
•
•
Signal
Signal
tx_se0
Fbaud_rate: Baud rate frequency. The maximum baud rate the UART can support is (ipg_perclk frequency)/16.
rx_dm
tx_dat
rx_rcv
rx_dp
se0
dat
int
int
DAT_SE0 bidirectional, 3-wire mode
DAT_SE0 unidirectional, 6-wire mode
VP_VM bidirectional, 4-wire mode
VP_VM unidirectional, 6-wire mode
shows the serial mode signal map for 6-pin Full speed/Low speed (FsLs) serial mode.
shows the serial mode signal map for 3-pin FsLs serial mode.
USBOH3 Parameters
Maps to
Maps to
data(0)
data(1)
data(2)
data(3)
data(0)
data(1)
data(2)
data(3)
data(4)
data(5)
data(6)
data(7)
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
Table 111. Serial Mode Signal Map for 6-pin FsLs Serial Mode
Table 112. Serial Mode Signal Map for 3-pin FsLs Serial Mode
Direction
Section 4.7.19, “USB PHY
Direction
Out
Out
Out
Out
Out
In
In
In
Out
I/O
I/O
In
Active high transmit enable
Transmit differential data on D+/D–
Transmit single-ended zero on D+/D–
Active high interrupt indication
Must be asserted whenever any unmasked interrupt occurs
Single-ended receive data from D+
Single-ended receive data from D–
Differential receive data from D+/D–
Reserved The PHY must drive this signal low
Active high transmit enable
Transmit differential data on D+/D– when tx_enable is high
Receive differential data on D+/D– when tx_enable is low
Transmit single-ended zero on D+/D– when tx_enable is high
Receive single-ended zero on D+/D– when tx_enable is low
Active high interrupt indication
Must be asserted whenever any unmasked interrupt occurs
Parameters.”
Description
Description
Electrical Characteristics
141