FSBM30SM60A Fairchild Semiconductor, FSBM30SM60A Datasheet
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FSBM30SM60A
Specifications of FSBM30SM60A
FSBM30SM60A_NL
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FSBM30SM60A Summary of contents
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... In addition the incorporated HVIC facilitates the use of single-supply drive topology enabling the FSBM30SM60A to be driven by only one drive supply voltage without negative bias. Inverter current sensing application can be achieved due to the divided negative dc terminals ...
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... V S(V) S(V) S(V) (20) IN (20) IN (20) IN (21) V (21) V (21) V CC(WH) CC(WH) CC(WH) (22) V (22) V (22) V B(W) B(W) B(W) (23) V (23) V (23) V S(W) S(W) S(W) ©2003 Fairchild Semiconductor Corporation Top View (L) (L) (L) (L) (L) ( (UH) (UH) (UH) (VH) (VH) (VH) (H) (H) (H) (WH) (WH) (WH) Fig. 2. (24) NC ...
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... No Connection 26 N Negative DC–Link Input for U Phase Negative DC–Link Input for V Phase Negative DC–Link Input for W Phase Output for U Phase 30 V Output for V Phase 31 W Output for W Phase 32 P Positive DC–Link Input ©2003 Fairchild Semiconductor Corporation Pin Description Rev. E, August 2003 ...
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... Inverter low-side is composed of three sense-IGBTs including freewheeling diodes for each IGBT and one control IC which has gate driving, current sensing and protection functions. 2) Inverter power side is composed of four inverter dc-link input pins and three inverter output pins. 3) Inverter high-side is composed of three normal-IGBTs including freewheeling diodes and three drive ICs for each IGBT. ©2003 Fairchild Semiconductor Corporation Bottom View ...
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... Fault Output Current Current Sensing Input Voltage V Total System Item Self Protection Supply Voltage Limit (Short-Circuit Protection Capability) Module Case Operation Temperature Storage Temperature Isolation Voltage ©2003 Fairchild Semiconductor Corporation (T = 25°C, Unless Otherwise Specified) J Symbol Condition V Applied between Applied between P- N ...
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... IC OFF internally. For the detailed information, please see Fig. 4. ©2003 Fairchild Semiconductor Corporation Condition Each IGBT under Inverter Operating Condition Each FWDi under Inverter Operating Condition Ceramic Substrate (per 1 Module) Thermal Grease Applied (Note 3) ), please refer to Fig ...
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... (a) Turn- 100V/div time : 0.1us/div. (a) turn-on (a) Turn-on Fig. 5. Experimental Results of Switching Waveforms Test Condition: Vdc=300V, Vcc=15V, L=500uH (Inductive Load), T ©2003 Fairchild Semiconductor Corporation IN(OFF) Fig. 4. Switching Time Definition : 10A/div OFF t C(OFF) (b) Turn-off I : 10A/div 100V/div time : 0.1us/div. (b) turn-off (b) Turn-off =25° ° ° ° Rev ...
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... Symbol Supply Voltage Control Supply Voltage V High-side Bias Voltage Blanking Time for Preventing t Arm-short PWM Input Signal f Input ON Threshold Voltage V IN(ON) Input OFF Threshold Voltage V IN(OFF) ©2003 Fairchild Semiconductor Corporation (T = 25°C, Unless Otherwise Specified) J Condition V = 15V V - COM CC CC( (UL, VL, WL 15V ...
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... Fig Variation by change of Shunt Resistors (R SC (1) @ around 100% Rated Current Trip (I (2) @ around 150% Rated Current Trip (I ©2003 Fairchild Semiconductor Corporation (1) (2) 0.01 0.02 0.03 [ Ω 0.04 0. for Short-Circuit Protection SW · = 30A) C · · = 45A) C · Rev. E, August 2003 ...
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... Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction. 8. Avoid one side tightening stress. Fig.8 shows the recommended torque order for mounting screws. Uneven mounting can cause the SPM ceramic substrate to be damaged. ©2003 Fairchild Semiconductor Corporation Condition Recommended 10Kg•cm Recommended 0.98N• ...
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... Fig. 9. Under-Voltage Protection (Low-side) Input Signal Output Current Fault Output Signal P1 : Normal operation - IGBT ON and conducting current P2 : Under-Voltage detection P3 : IGBT gate interrupt fault signal P5 : Under-Voltage reset P6 : Normal operation - IGBT ON and conducting current Fig. 10. Under-Voltage Protection (High-side) ©2003 Fairchild Semiconductor Corporation detect detect V BS ...
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... P4 : IGBT is slowly turned off P5 : IGBT OFF signal P6 : IGBT ON signal - but IGBT cannot be turned on during the fault Output activation P7 : IGBT OFF state P8 : Fault Output reset and normal operation start Fig. 11. Short-Circuit Current Protection (Low-side Operation only) ©2003 Fairchild Semiconductor Corporation Detection P1 P4 ...
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... SPM pins. Fig. 12. Recommended CPU I/O Interface Circuit These Values depend ontrol Algorithm 15V-Line Ω 20 470uF 0.1uF Note: It would be recommended that the bootstrap diode, D Fig. 13. Recommended Bootstrap Operation Circuit and Parameters ©2003 Fairchild Semiconductor Corporation 5V-Line 4.7k 2k 4.7k Ω Ω ...
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... P&N pins is recommended. 12)Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays recommended that the distance be 5cm at least. ©2003 Fairchild Semiconductor Corporation 15V line 5V line ...
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... Detailed Package Outline Drawings 28x2.00 (2.00) MAX1.05 2.00 0.60 ±0.30 0.40 #23 #32 19.86 11.0 ±0. 10.14 0.80 1.30 ±0.10 MAX3.20 ©2003 Fairchild Semiconductor Corporation SPM32-AA 56.0 ±0.30=( ) MAX1.00 0.60 ±0.10 ±0.10 0.40 28.0 ±0.30 #1 #24 ±0.30 (46.60) 53.0 ±0.30 60.0 ±0.50 3x7 ...
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... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FRFET™ CROSSVOLT™ ...