FSB50550US Fairchild Semiconductor, FSB50550US Datasheet - Page 2

• Manufacturer Part Number: FSB50550US
• Description: MODULE SPM 500V 1.2A SPM23
• Manufacturer: Fairchild Semiconductor
• Series: SPM®r
• Type: FETr

Specifications of FSB50550US

• Configuration: 3 Phase
• Current: 2A
• Voltage: 500V
• Voltage - Isolation: 1500Vrms
• Package / Case: SPM23BD
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FSB50550USTR

FSB50550US Rev. A
Pin Descriptions
Note:
Pin Number
Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside SPM
ure 2 and 5.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
1
2
3
4
5
6
7
8
9
Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)
Pin Name
V
V
V
IN
IN
IN
IN
IN
IN
V
V
COM
V
V
V
V
CC(W)
CC(U)
CC(V)
N
N
B(W)
S(W)
N
B(U)
S(U)
B(V)
S(V)
(WH)
W
(WL)
U
(UH)
(VH)
P
V
(UL)
(VL)
W
U
V
(1) COM
(2) V
(3) V
(4) IN
(5) IN
(6) V
(7) V
(8) V
(9) IN
(10) IN
(11) V
(12) V
(13) V
(14) IN
(15) IN
(16) V
IC Common Supply Ground
Bias Voltage for U Phase High Side FRFET Driving
Bias Voltage for U Phase IC and Low Side FRFET Driving
Signal Input for U Phase High-side
Signal Input for U Phase Low-side
Bias Voltage Ground for U Phase High Side FRFET Driving
Bias Voltage for V Phase High Side FRFET Driving
Bias Voltage for V Phase IC and Low Side FRFET Driving
Signal Input for V Phase High-side
Signal Input for V Phase Low-side
Bias Voltage Ground for V Phase High Side FRFET Driving
Bias Voltage for W Phase High Side FRFET Driving
Bias Voltage for W Phase IC and Low Side FRFET Driving
Signal Input for W Phase High-side
Signal Input for W Phase Low-side
Bias Voltage Ground for W Phase High Side FRFET Driving
Positive DC–Link Input
Output for U Phase
Negative DC–Link Input for U Phase
Negative DC–Link Input for V Phase
Output for V Phase
Negative DC–Link Input for W Phase
Output for W Phase
B(U)
CC(U)
S(U)
B(V)
CC(V)
(UH)
(UL)
(VH)
S(V)
B(W)
CC(W)
S(W)
(VL)
(WH)
(WL)
COM
COM
COM
VCC
VCC
VCC
HIN
HIN
HIN
LIN
LIN
LIN
VB
HO
VS
VB
HO
VS
VB
HO
VS
LO
LO
LO
2
Pin Description
(17) P
(18) U
(19) N
(20) N
(21) V
(22) N
(23) W
®
. External connections should be made as indicated in Fig-
U
V
W
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