MFRC50001T/0FE,112 NXP Semiconductors, MFRC50001T/0FE,112 Datasheet - Page 43

• Manufacturer Part Number: MFRC50001T/0FE,112
• Description: IC MIFARE READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC50001T/0FE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B, ISO15693
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2222-5; 935268039112; MFRC500; MFRC51T0FED

NXP Semiconductors
MFRC500_33
Product data sheet
PUBLIC
10.5.1.1 Page register
10.5.1 Page 0: Command and status
10.5 Register descriptions
Table 32.
Selects the page register.
Table 33.
Table 34.
Flag(s)
TX1RFEn
TX2Cw
TX2Inv
TX2RFEn
TxCRCEn
TxIEn
TxIRq
TxLastBits[2:0]
UsePageSelect
WaterLevel[5:0]
ZeroAfterColl
Bit
Symbol
Access
Bit
7
6 to 3
2 to 0
Symbol
UsePageSelect 1
0000
PageSelect[2:0] -
MFRC500 register flags overview
Page register (address: 00h, 08h, 10h, 18h, 20h, 28h, 30h, 38h)
reset value: 1000 0000b, 80h bit allocation
Page register bit descriptions
All information provided in this document is subject to legal disclaimers.
UsePageSelect
R/W
Rev. 3.3 — 15 March 2010
7
ChannelRedundancy
Page
Register
TxControl
TxControl
TxControl
TxControl
InterruptEn
InterruptRq
BitFraming
FIFOLevel
DecoderControl
Value
0
-
048033
Description
the value of PageSelect[2:0] is used as the register address
A5, A4, and A3. The LSBs of the register address are
defined using the address pins or the internal address latch,
respectively.
the complete content of the internal address latch defines
the register address. The address pins are used as
described in
reserved
when UsePageSelect = logic 1, the value of PageSelect is
used to specify the register page (A5, A4 and A3 of the
register address)
6
Highly Integrated ISO/IEC 14443 A Reader IC
…continued
5
0000
Table 5 on page
R/W
0
3
3
1
2
4
4
2 to 0
7
5
Bit
5 to 0
4
Address
11h
11h
11h
11h
22h
06h
07h
0Fh
00h, 08h, 10h, 18h, 20h, 28h, 30h
and 38h
29h
1Ah
3
8.
R/W
2
MFRC500
PageSelect[2:0]
© NXP B.V. 2010. All rights reserved.
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1
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