MFRC50001T/0FE,112 NXP Semiconductors, MFRC50001T/0FE,112 Datasheet - Page 37

• Manufacturer Part Number: MFRC50001T/0FE,112
• Description: IC MIFARE READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC50001T/0FE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO14443-A, ISO14443-B, ISO15693
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2222-5; 935268039112; MFRC500; MFRC51T0FED

NXP Semiconductors
10. MFRC500 registers
MFRC500_33
Product data sheet
PUBLIC
10.1.1 Page registers
10.1.2 Dedicated address bus
10.1.3 Multiplexed address bus
10.1 Register addressing modes
Three methods can be used to operate the MFRC500:
The commands, configuration bits and flags are accessed using the microprocessor
interface. The MFRC500 can internally address 64 registers using six address lines.
The MFRC500 register set is segmented into eight pages contain eight registers each. A
Page register can always be addressed, irrespective of which page is currently selected.
When using the MFRC500 with the dedicated address bus, the microprocessor defines
three address lines using address pins A0, A1 and A2. This enables addressing within a
page. To switch between registers in different pages a paging mechanism needs to be
used.
Table 28
Table 28.
The microprocessor may define all six address lines at once using the MFRC500 with a
multiplexed address bus. In this case either the paging mechanism or linear addressing
can be used.
Table 29
Table 29.
Register bit: UsePageSelect
1
Multiplexed
address bus
type
Paging mode
Linear
addressing
•
•
•
initiating functions and controlling data by executing commands
configuring the functional operation using a set of configuration bits
monitoring the state of the MFRC500 by reading status flags
shows how the register address is assembled.
shows how the register address is assembled.
Dedicated address bus: assembling the register address
Multiplexed address bus: assembling the register address
All information provided in this document is subject to legal disclaimers.
UsePage
Select
1
0
Rev. 3.3 — 15 March 2010
048033
Register address
PageSelect2 PageSelect1 PageSelect0 AD2
AD5
Register address
PageSelect2
Highly Integrated ISO/IEC 14443 A Reader IC
AD4
PageSelect1
AD3
PageSelect0
MFRC500
© NXP B.V. 2010. All rights reserved.
AD2
A2 A1 A0
AD1 AD0
AD1 AD0
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