SI4022-A1-FT Silicon Laboratories Inc, SI4022-A1-FT Datasheet - Page 18

• Manufacturer Part Number: SI4022-A1-FT
• Description: IC TX FSK 915MHZ 3.8V 16-TSSOP
• Manufacturer: Silicon Laboratories Inc
• Type: ISM Band FSK Transmitterr

Specifications of SI4022-A1-FT

• Package / Case: 16-TSSOP
• Frequency: 868MHz, 915MHz
• Applications: ISM
• Modulation Or Protocol: FSK
• Data Rate - Maximum: 115.2kbps
• Power - Output: 6dBm
• Current - Transmitting: 24mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2.2 V ~ 3.8 V
• Operating Temperature: -40°C ~ 85°C
• Operating Frequency: 434 MHz to 915 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Supply Current: 24 mA
• Supply Voltage (max): 3.8 V
• Supply Voltage (min): 2.2 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1623-5

Data packet structure
Data packet structure
Important:
Important:
EXAMPLE APPLICATIONS: DATA PACKET TRANSMISSION
Data packet structure
Data packet structure
Data packet structure
An example data packet structure using theSi4022 –Si4022 pair for data transmission. This packet structure is an example of how to use the
high efficiency FIFO mode at the receiver side:
The first 3 bytes compose a 24 bit length ‘01’ pattern to let enough time for the clock recovery of the receiver to lock. The next two bytes
compose a 16 bit synchron pattern which is essential for the receiver’s FIFO to find the byte synchron in the received bit stream. The
synchron patters is followed by the payload. The first byte transmitted after the synchron pattern (D
received byte in the FIFO.
Important:
Important: The bytes of the data stream should follow each other continuously, otherwise the clock recovery circuit of the receiver side
Important:
will be unable to track.
Further details of packet structures can be found in the IA ISM-UGSB1 software development kit manual.
AA AA AA 2D D4
Prea mble
Synchron pattern
D
0
Databytes (received in the
D
1
FIFO of the receive r)
D
2
. . .
D
0
N
in the picture above) will be the first
Si4022
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