SI4022-A0-FTR Silicon Laboratories Inc, SI4022-A0-FTR Datasheet

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SI4022-A0-FTR

Manufacturer Part Number
SI4022-A0-FTR
Description
IC TX FSK UNI 868/915MHZ 16TSSOP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4022-A0-FTR

Frequency
868MHz, 915MHz
Applications
ISM
Modulation Or Protocol
FSK
Data Rate - Maximum
115.2kbps
Power - Output
6dBm
Current - Transmitting
24mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
2.2 V ~ 3.8 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Memory Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
SI4022-A0-FTR
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
SI4022-A0-FTR
Manufacturer:
SLICON
Quantity:
20 000
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Part Number:
SI4022-A0-FTR
Quantity:
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Si4022 Universal ISM Band
FSK Transmitter
DESCRIPTION
Integration’s Si4022 is a single chip, low power, multi-channel FSK
transmitter designed for use in applications requiring FCC or ETSI
conformance for unlicensed use in the bands at 868 and 915 MHz. Used in
conjunction with Integration’s FSK receivers, it is a flexible, low cost, and
highly integrated solution that does not require production alignments. All
required RF functions are integrated. Only an external crystal and bypass
filtering is needed for operation.
The transmitter has a completely integrated PLL for easy RF design, and its
rapid settling time allows for fast frequency-hopping, bypassing multipath
fading and interference to achieve robust wireless links. The PLL’s high
resolution allows the usage of multiple channels in any of the bands. In
addition, highly stable and accurate FSK modulation is accomplished by
direct closed-loop modulation with bit rates up to 115.2 kbps.
The integrated power amplifier of the transmitter has an open-collector
differential output and can directly drive a loop antenna with programmable
output level, no additional matching network is required. An automatic
antenna tuning circuit is built in to avoid both costly trimming procedures
and de-tuning due to the “hand effect”.
For battery-operated applications the device supports various power saving
modes with wake-up interrupt generation options based on a low battery
voltage detector and a sleep timer. Several additional features ease system
design. Power-on reset and clock signals are provided to the microcontroller.
An on-chip baud rate generator and a data FIFO are available. The transmitter
is programmed and controlled via an SPI compatible interface.
IA4222-DS rev 1.1r 0308
VREFO
VSS_A
VDD_B
VSS_D
VDD
XTL
15
11
14
9
8
7
OSCILLATOR
CRYSTAL
BATTERY
WAKE -UP
DETECT
TIMER
LOW
FUNCTIONAL BLOCK DIAGRAM
REFERENCE
TRESHOLD
LOAD CAP
LOW BAT
TIMEOUT
PERIOD
CLOCK
SYNTHESIZER
CONTROLLER
nRES
10
FREQUENCY
LEVEL
13
12
16
6
5
4
1
2
3
RF02
RF01
CLK
nIRQ
SDO
SDI
SCK
nSEL
FSK
FEATURES
• Fully integrated (low BOM, easy design-in)
• No alignment required in production
• Fast settling, programmable, high-resolution PLL
• Fast frequency hopping capability
• Stable and accurate FSK modulation with
• Programmable PLL loop bandwidth
• Direct loop antenna drive
• Automatic antenna tuning circuit
• Programmable output power level
• SPI bus for interfacing with microcontroller
• Clock and reset signals for microcontroller
• 64 bit TX data FIFO
• Integrated programmable crystal load capacitor
• Standard 10 MHz crystal reference
• Power-saving modes
• Multiple event handling options for wake-up
• Wake-up timer
• Low battery detection
• 2.2 to 3.8 V supply voltage
• Low power consumption
• Low standby current (typ. 0.3 μA)
TYPICAL APPLICATIONS
• Remote control
• Home security and alarm
• Wireless keyboard/mouse and other PC peripherals
• Toy control
• Remote keyless entry
• Tire pressure monitoring
• Telemetry
• Personal/patient data logging
• Remote automatic meter reading
See www.silabs.com/integration for any applicable
programmable deviation
activation
errata. See back page for ordering information.
This document refers to Si4022-IC Rev A0.
VREFO
VSS_D
nSEL
nIRQ
SCK
SDO
CLK
SDI
PIN ASSIGNMENT
PIN ASSIGNMENT
PIN ASSIGNMENT
PIN ASSIGNMENT
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
Si4022
www.silabs.com/integration
15
14
13
12
11
10
16
9
FSK
VDD
VSS_B
RF02
RF01
VSS_A
nRES
XTL / REF
1

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