TDA5250 Infineon Technologies, TDA5250 Datasheet

TX/RX ASK/FSK 868-870MHZ 38TSSOP

TDA5250

Manufacturer Part Number
TDA5250
Description
TX/RX ASK/FSK 868-870MHZ 38TSSOP
Manufacturer
Infineon Technologies
Type
Transceiverr
Datasheets

Specifications of TDA5250

Package / Case
38-TSSOP
Frequency
868MHz
Data Rate - Maximum
64kbps
Modulation Or Protocol
ASK, FSK
Applications
RKE, Remote Control Systems
Power - Output
9dBm
Sensitivity
-109dBm
Voltage - Supply
2.1 V ~ 5.5 V
Current - Receiving
9mA
Current - Transmitting
12mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Operating Frequency
870 MHz
Operating Supply Voltage
2.5 V, 3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
4.4mm
Product Length (mm)
9.7mm
Operating Supply Voltage (min)
2.1V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
Other names
SP000012956
TDA5250
TDA5250INTR
TDA5250XT
TDA5250XT

Available stocks

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Price
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TDA5250
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Part Number:
TDA5250D2
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Part Number:
TDA5250D2
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Quantity:
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Da ta S heet, Versio n 1.7, 2 007-02-26
TDA5250 D2
A S K / F S K 8 6 8 M H z W i r e l e s s
T r a n s c e i v e r
W i r e l e s s C o m p o n e n t s
N e v e r
s t o p
t h i n k i n g .

Related parts for TDA5250

TDA5250 Summary of contents

Page 1

... heet, Versio n 1.7, 2 007-02-26 TDA5250 ...

Page 2

... Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body support and/or maintain and sustain and/or protect human life ...

Page 3

... heet, Versio n 1.7, 2 007-02-26 TDA5250 ...

Page 4

... Controller Area Network (CAN): License of Robert Bosch GmbH 2007-02-26 V1 July 2002 ® , ARCOFI -BA, ARCOFI ® ® ® 56, FALC -E1, FALC ® ® -S, ISAC -S TE, ISAC ® ® , SICOFI , SICOFI TDA5250 D2 ® ® ® -SP, DigiTape , EPIC ® ® -LH, IDEC , IOM , IOM ® ® ® -P TE, ITAC , IWE , MUSAC ® ® ...

Page 5

... C/3-wire µController Interface Application Low Bitrate Communication Systems Keyless Entry Systems Remote Control Systems Type TDA5250 D2 Data Sheet On-chip low pass channel select filter and data filter with tuneable bandwidth Data slicer with self-adjusting threshold and 2 peak detectors FSK sensitivity <-109dBm, ASK sensitivity < ...

Page 6

... Wakeup Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.17 Data Valid Detection, Data Pin . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.18 Sequence Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.19 Clock Divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4.20 RSSI and Supply Voltage Measurement . . . . . . . . . . . . . . . . . . 3 Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 LNA and PA Matching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1.1 RX/TX Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Switch in RX-Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Switch in Data Sheet st Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . nd I/Q Mixers . . . . . . . . . . . . . . . . . . . . . . . . . . 6 TDA5250 D2 Version 1.7 page ...

Page 7

... Sensitivity depending on the ambient Temperature . . . . . . . . . 3.10.3 BER performance depending on Supply Voltage . . . . . . . . . . . 3.10.4 Datarates and Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.10.5 Sensitivity at Frequency Offset . . . . . . . . . . . . . . . . . . . . . . . . . 3.11 Default Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.2 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.3 AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1.4 Digital Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Sheet 7 TDA5250 D2 Version 1.7 page ...

Page 8

... Table of Contents 4.2 Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3 Test Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.4 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Sheet 8 TDA5250 D2 Version 1.7 page 2007-02-26 ...

Page 9

... Transmit power up to +13 dBm in 50Ω load at 5V supply voltage Maximum datarate kBaud Manchester encoded 2 I C/3-wire microcontroller interface, working at max. 400kbit/s meets the ETSI EN300 220 regulation and CEPT ERC 7003 recommendation Data Sheet Product Description 9 TDA5250 D2 Version 1.7 2 C/3-wire 2007-02-26 ...

Page 10

... Application Low Bitrate Communication Systems Keyless Entry Systems Remote Control Systems Alarm Systems Telemetry Systems Electronic Metering Home Automation Systems 1.4 Package Outlines Figure 1-1 PG-TSSOP-38 package outlines Data Sheet Product Description 10 TDA5250 D2 Version 1.7 PG-TSSOP-38.EPS 2007-02-26 ...

Page 11

... GND1 GNDPA PA VCC1 PDN PDP SLC VDD BUSDATA BUSCLK VSS XOUT Figure 2-1 Pin Configuration Data Sheet TDA5250 TDA5250 D2 Version 1.7 Functional Description 38 CI1 37 CI1x 36 CQ1 35 CQ1x 34 CI2 33 CI2x 32 CQ2 31 CQ2x 30 GND 29 RSSI 28 DATA ___ 27 PWDDD 26 CLKDIV ______ 25 RESET ___ 24 EN ...

Page 12

... ASKFSK Data Sheet 350 2 200 350 4 12 TDA5250 D2 Version 1.7 Functional Description Function Analog supply (antiparallel diodes between VCC, VCC1, VDD) Bus mode selection (I²C/3 wire bus mode selection) Loop filter and VCO control voltage ASK/FSK- mode switch input 2007-02-26 ...

Page 13

... Pin see Pin 8 10 Ω 9 GndPA see Pin 1 13 TDA5250 D2 Version 1.7 Functional Description RX/TX-mode switch input/output RF input to differential Low Noise Amplifier (LNA)) Analog supply (antiparallel diodes between VCC, VCC1, VDD Bus mode selection (I²C/3 wire bus mode selection) Ground return for PA output stage ...

Page 14

... Pin 1 15k 350 350 17 see Pin 8 14 TDA5250 D2 Version 1.7 Functional Description Output of the negative peak detector Output of the positive peakdetector Slicer level for the data slicer Digital supply Bus data in/output Bus clock input Ground for digital section ...

Page 15

... Vcc-860mV 150µA 125fF ..... 4pF 250fF ..... 8pF see Pin see Pin 22 350 24 15 TDA5250 D2 Version 1.7 Functional Description Crystal oscillator output, can also be used as external reference frequency input. 19 FSK modulation switch ASK modulation/FSK center frequency switch Crystal oscillator ground return 3-wire bus enable input ...

Page 16

... Clock output 350 Power Down input (active high), data detect output (active low) 30k 350 TX Data input, RX data output (RX powerdown: pin 28 @ GND) 350 RSSI output S&H 350 16p 37k 16 TDA5250 D2 Version 1.7 Functional Description 2007-02-26 ...

Page 17

... Data Sheet see Pin 8 Analog ground Pin for external Capacitor Q-channel, stage 2 Stage1:Vcc-630mV Stage2: Vcc-560mV II Q-channel, stage 2 II I-channel, stage 2 II I-channel, stage 2 II Q-channel, stage 1 II Q-channel, stage 1 II I-channel, stage 1 II I-channel, stage 1 17 TDA5250 D2 Version 1.7 Functional Description 2007-02-26 ...

Page 18

... Functional Block Diagram BUSMODE __ EN BUSCLK BUSDATA SLC CQ2x 31 32 CQ2 33 CI2x 34 CI2 35 CQ1x 36 CQ1 37 CI1x 38 CI1 (digital) (analog) (LNA/PA) Figure 2-2 Main Block Diagram Data Sheet Functional Description TDA5250D1_blockdiagram_aktuell.wmf 18 TDA5250 D2 Version 1.7 2007-02-26 ...

Page 19

... IF signal down to zero-IF. These two mixers are driven by a signal that is generated by dividing the local oscillator signal by 4, thus equalling the IF frequency. Data Sheet Description 0= low TX Power, 1= high TX Power Description 0= low Gain, 1= high Gain st Mixer nd I/Q Mixers 19 TDA5250 D2 Version 1.7 Functional Description Default 1 Default 1 2007-02-26 ...

Page 20

... The resulting I- and Q-channel RSSI-signals are summed to the nominal RSSI signal. Data Sheet th order low pass filters that are used for OP INTERNAL BUS 20 TDA5250 D2 Version 1.7 Functional Description [2 – 1] iq_filter.wmf 2007-02-26 ...

Page 21

... The 2-pole data filter has a Sallen-Key architecture and is implemented fully on-chip. The bandwidth can be adjusted between approximately 5kHz and 102kHz via the bits the LPF register as shown in Table 3-10. Data Sheet Functional Description 0 50 100 150 200 250 300 350 f /kHz 21 TDA5250 D2 Version 1.7 Qaudricorrelator.wmf 2007-02-26 ...

Page 22

... Powerdown&DataDetect PwdDD pin (pin 27) as shown in the following table. Powerdown mode can either be activated by pin 27 or bit D14 in register 00h. In powerdown mode also pin 28 (DATA) is affected (see Section 2.4.17). Data Sheet OTA Description 0= Lowpass Filter, 1= Peak Detector 22 TDA5250 D2 Version 1.7 Functional Description data_filter.wmf Default 0 2007-02-26 ...

Page 23

... TH3 FREQUENCY window TH1<T <TH2 GATE RX DATA FSK DATA CONTROL ASK DATA LOGIC BLOCK ENABLE ASK / FSK POWER ON SEQUENCER 23 TDA5250 D2 Version 1.7 Functional Description Operating State Powerdown Mode Device On 2 C/3-wire microcontroller 18 MHz XTAL-Osz. WAKEUP LOGIC 32kHz RC-Osz. CLKDiv PwdDD Data ...

Page 24

... LOW thus enabling the device. 2.4.15 Bus Interface and Register Definition The TDA5250 supports the I selectable by the BusMode pin (pin 2) as shown in the following table. All bus pins (BusData, BusCLK, EN, BusMode) have a Schmitt-triggered input stage. The BusData pin is bidirectional where the output is open drain driven by an internal 15k ...

Page 25

... To start the communication, the bus master must initiate a start condition (STA), followed by the 8bit chip address. The chip address for the TDA5250 is fixed as „1110000“ (MSB at first). The last bit (LSB=A0) of the chip address byte defines the type of operation to be performed: A0=0, a write operation is selected and A0=1 a read operation is selected ...

Page 26

... ACK MSB SUB ADDRESS (READ) LSB 80H, 81H ACK STA DATA OUT FROM SUB ADDRESS TDA5250 D2 Version 1.7 Functional Description LSB MSB DATA ACK ACK STO LSB MSB DATA ACK D15 ... D8 ACK D7 D6 ... MSB CHIP ADDRESS (READ LSB ...

Page 27

... ... LSB MSB SPI INTERFACE WAKEUP ON_TIME [16 Bit] OFF_TIME [16 Bit] COUNT_TH1 [16Bit] COUNT_TH2 [16Bit] RSSI_TH3 [8 Bit] 27 TDA5250 D2 Version 1.7 Functional Description DATA IN X...0 (X DATA OUT FROM SUB ADDRESS FILTER LPF [8 Bit] XTAL XTAL_TUNE [16Bit] FSK [16Bit] XTAL_CONFIG [8 Bit] register_overview.wmf ...

Page 28

... TX Power, 1= high TX Power 28 TDA5250 D2 Version 1.7 Functional Description Description General definition of status bits Values for FSK-shift Nominal frequency ...

Page 29

... TX Power, 1= high TX Power 29 TDA5250 D2 Version 1.7 Functional Description Description General definition of status bits Values for FSK-shift Nominal frequency ...

Page 30

... D11 0 D10 TDA5250 D2 Version 1.7 Functional Description Sub Address 02H: XTAL_TUNING Function Value Description not used not used not used not used not used not used not used not used not used not used 8pF Setting for nominal 4pF frequency 2pF ...

Page 31

... Power Amplifier 1= power down PLL 1= power down XTAL Oscillator Table 2-30 Bit Description data rate < TH1 TH2 < data rate TDA5250 D2 Version 1.7 Functional Description Sub Address 0DH: CLK_DIV Function not used not used DIVMODE_1 DIVMODE_0 CLKDIV_3 CLKDIV_2 CLKDIV_1 CLKDIV_0 Default ...

Page 32

... SLAVE MODE (default) MODE_1 = 0 MODE_2 = 0 MODE TIMER MODE MODE_1 = 1 MODE_2 = X MODE_2 SELF POLLING MODE ON_TIME OFF_TIME RX ON: valid Data min. 2.6ms 15µs 32 TDA5250 D2 Version 1.7 Functional Description MODE_1 = 0 MODE_2 = 1 Mode SLAVE MODE TIMER MODE ON_TIME RX ON: invalid Data timing_selfpllmode.wmf 2007-02-26 3_modes.wmf t t ...

Page 33

... Window counter into continuous mode (Register 00H, Bit 1). Data Sheet ON_TIME OFF_TIME Register 04H Register 05H 15µs 15µs Amplitude Frequency & RSSI Window DATA on air no DATA on air f 33 TDA5250 D2 Version 1.7 Functional Description ON_TIME Register 04H t t timing_timermode.wmf Frequency data_rate_detect.wmf GATE between 2007-02-26 ...

Page 34

... Note required to activate the device for the duration of t Only if this is done the normal operation timing is performed. Data Sheet 0,5*TH1 T 0,5*TH2 GATE TH1 T TH2 GATE RSSI TH3 34 TDA5250 D2 Version 1.7 Functional Description DATA VALID data_valid.wmf Data 28 data_switch.wmf (see Figure 2-15). SYSSU after first power reset. SYSSU 2007-02-26 ...

Page 35

... TXSU TXSU 1.1ms 1.1ms t RXSU 2.2ms t DDSU 2.6ms PWDDD = low PD TX activ or RX activ t TXSU 1.1ms t SYSSU 8ms 35 TDA5250 D2 Version 1.7 Functional Description PD RX activ TX activ RX activ * t CLKSU 0.5ms t TXSU 1.1ms t t RXSU RXSU 2.2ms 2.2ms t t DDSU DDSU 2 ...

Page 36

... RX is activated. DDSU setup time to enable the power amplifier. TXSU RESET 2 32 kHz ASK/FSK INTERNAL BUS 16 4 BIT COUNTER 32 kHz WINDOW COUNT COMPLETE 36 TDA5250 D2 Version 1.7 Functional Description RC- OSC. XTAL FREQU. SELECT 16 sequencer_raw.wmf CLKDiv 26 clk_div.wmf 2007-02-26 ...

Page 37

... Output from Divider (default) 18.089MHz 32kHz Window Count Complete Total Divider Ratio Output Frequency [MHz Input for 6Bit-ADC Vcc / 5 RSSI (default) 37 TDA5250 D2 Version 1.7 Functional Description 9,0 4,5 3,0 2,25 1,80 1,50 1,28 1,125 1,00 (default) 0,90 0,82 0,75 0,69 0,64 0,60 0,56 2007-02-26 ...

Page 38

... ADC- Power Down feedback Bit (D7) and the SELECT feedback Bit (D6) which correspond to the actual measurement. Note: As shown in Section 2.4.18 there is a setup time of 2.6ms after RX activating. Thus the measurement of RSSI voltage does only make sense after this setup time. Data Sheet Functional Description 38 TDA5250 D2 Version 1.7 2007-02-26 ...

Page 39

... The RX/TX-switch is set to the receive mode by either applying a high level or an open to the RX/ TX-jumper on the evalboard or by leaving it open. Then both pin-diodes are not biased and therefore have a high impedance. Data Sheet VCC C10 L3 RX/TX RX/ TDA5250 D2 Version 1.7 Application PA LNI LNIX RX/TX_Switch.wmf 2007-02-26 ...

Page 40

... However, the final values of the matching components always have to be found on the board because of the parasitics of the board, which highly influence the matching circuit at RF. Data Sheet VCC C10 L3 RX/TX RX/ TDA5250 D2 Version 1.7 Application PA LNI LNIX RX_Mode.wmf 2007-02-26 ...

Page 41

... The loaded Q should not get too high because of 2 reasons: more losses in the matching network and hence less sensitivity Data Sheet − = 810 MHz 120 MHz = MHz   − ∗ − log  1    41 TDA5250 D2 Version 1.7 Application S11_measured.pcx. [3 – – – – 4] 2007-02-26 ...

Page 42

... Switch in TX-Mode The evalboard can be set into the TX-Mode by grounding the RX/TX-jumper on the evalboard or programming the TDA5250 to operate in the TX-Mode. If the IC is programmed to operate in the TX-Mode, the RX/TX-pin will act as an open drain output at a logical LOW. Then a DC-current can flow from VCC to GND via L1, L2, D1, R1 and D2. ...

Page 43

... C2, C3 L2, C4 and L1. When designing the matching of the PA, C2 must not be changed anymore because its value is already fixed by the LNA-input-matching. Data Sheet VCC C10 L3 RX/ LNI LNIX C10 L3 43 TDA5250 D2 Version 1.7 Application C5 PA LNI LNIX RX/TX TX_Mode.wmf TX_Mode_simplified.wmf 2007-02-26 ...

Page 44

... The collector efficiency E is defined as Data Sheet Ω . The high efficiency under “critical” operating conditions can practice the RF-saturation voltage of the PA transistor and other . LC 44 TDA5250 D2 Version 1.7 Application Equivalent_power_wmf. [3 – – This is particularly true for low 2007-02-26 > ...

Page 45

... MHz. The effective load resistor of this circuit 240Ohm, which is the optimum impedance for operation at 3V. This will lead to a dip of the collector current f approx. 20%. Data Sheet [3 – 11] [3 – 12] 45 TDA5250 D2 Version 1.7 Application [3 – 10] =3V. A power loss in S and P ...

Page 46

... Very short connections must be used. Do not remove the IC or any part of the matching-components! 5. Screw a 50Ohm-dummy-load on the RF-I/O-SMA-connector 6. The TDA5250 has ASK-TX-Mode, Data-Input=LOW sure that your network analyzer is AC-coupled and turn on the power supply of the IC. 8. Measure the S-parameter ...

Page 47

... Suppression of spurious harmonics may require some additional filtering within the antenna matching circuit. Both can be seen in Figure 3-10 and Figure 3-11 The total spectrum of the evalboard can be summarized as: Carrier fc +9dBm fc-18.1MHz -62dBm fc+18.1MHz -66dBm nd 2 harmonic -40dBm rd 3 harmonic -44dBm Data Sheet 47 TDA5250 D2 Version 1.7 Application Sparam_measured_200M.pcx 2007-02-26 ...

Page 48

... Manchester encoded PRBS9 (Pseudo Random Binary Sequence), RF output power is +9dBm at a supply voltage of 3V. With these settings ASK allows a maximum data rate of 25kBaud, in FSK case 40kBaud are possible. See also Section 4.1.4 Data Sheet 48 TDA5250 D2 Version 1.7 Application oberwellentx.tif spektrum_10r_3v.tif 2007-02-26 ...

Page 49

... Figure 3-12 ASK Transmit Spectrum 25kBaud, Manch, PRBS9, 9dBm, 3V Figure 3-13 FSK Transmit Spectrum 40kBaud, Manch, PRBS9, 9dBm, 3V Data Sheet ASK_25kBaud_Manch_PRBS9_10dBm_3V_Spectrum_CEPT_ERC7003.wmf FSK_40kBaud_Manch_PRBS9_10dBm_3V_Spectrum_CEPT_ERC7003.wmf 49 TDA5250 D2 Version 1.7 Application 2007-02-26 ...

Page 50

... Pulling Sensitivity of the crystal is defined as the magnitude of the relative change in frequency relating to the variation of the load capacitor. Data Sheet motional inductance of the crystal motional capacitance of the crystal shunt capacitance of the crystal TDA5250 D2 Version 1.7 Application – 13] [3 – 14] Crystal.wmf 2007-02-26 ...

Page 51

... C 1 > > frequency of quartz > L OSC > > The crystal oscillator in the TDA5250 is a NIC (negative impedance converter) oscillator type. The input impedance of this oscillator is a negative impedance in series to an inductance. Therefore the load capacitance of the crystal C capacitance C as shown in formula [3-17]. ...

Page 52

... L ⋅   --------------------------------- C   1 crystal load capacitance for nominal frequency shunt capacitance of the crystal motional capacitance of the crystal crystal oscillator frequency division ratio of the PLL 52 TDA5250 D2 Version 1.7 Application – 17] 2.45µH without pad . v [3 – 18] 2007-02-26 QOSZ_NIC.wmf ...

Page 53

... FSK+ Deviation Deviation Nominal Frequency *N (N: division ratio of the PLL). 0 are necessary. Via internal switches 3 external v 53 TDA5250 D2 Version 1.7 Application for FSK LOW can be calculated. ) signal can be applied at pin 19 (Xout). to realize the necessary frequency 2 in case of ASK- or FSK-modulation. v 2007-02-26 free_reg.wmf ...

Page 54

... XGND 23 FSK LOW Data Sheet COSC LOW RF DEV and C v2 tune2 ( ) tune2 tune2 tune1 tune2 54 TDA5250 D2 Version 1.7 Application [3 – 19] are bypassed. The effective C [3 – 20] is given by – 21 XOUT XIN 21 C tune1 XSWF 20 XSWA tune2 XGND 23 FSK HIGH is given v- 2007-02-26 ...

Page 55

... This offset is achieved by setting the oscillator frequency to the FSK HIGH transmit frequency, see Figure 3-17. Data Sheet L -R XOUT XIN XSWF 20 XSWA XGND ⋅ tune2 tune2 v3 55 TDA5250 D2 Version 1.7 Application [3 – 22] C tune1 C tune2 is given by: [3 – 23] 2007-02-26 QOSC_FSK.wmf QOSC_ASK.wmf ...

Page 56

... With the given parasitics the actual tune1 ------------------------------------------------------------------------------------------------------- tune1 ( ) ⋅ tune1 ---------------------------------------------------------------------------------------------------------------------------------------- - tune1 + Data Sheet L XOUT XIN XSWF 20 XSWA XGND 23 Value 4,5 pF FSK-: 2 FSK+&ASK: 2.3pF 1,3 pF can be calculated tune1 21 ) ⋅ tune2 + tune2 ( tune2 tune2 56 TDA5250 D2 Version 1.7 Application -R C tune1 C C tune2 20 QOSC_parasitics.wmf [3 – 24 – 26 2007-02-26 ...

Page 57

... C – ⋅ – v1 tune1 v+ = --------------------------------------------------------------------- - – – v1 tune1 ⋅ tune1 vm = ------------------------------------------------------------------------ - – tune1 vm 57 TDA5250 D2 Version 1.7 Application [3 – 25] [3 – 25] for FSK HIGH and – – – – C – – and for vm [3 – 27] [3 – 28] [3 – 29] have to v3 2007-02-26 ...

Page 58

... Value 8pF 4pF 2pF 1pF 500fF 250fF Value 8pF 4pF 2pF 1pF 500fF 250fF 58 TDA5250 D2 Version 1.7 Application Max. Bitrate > 32 kBit/s NRZ > 32 kBit/s NRZ 4 µ kBit/s NRZ 8 µ kBit/s NRZ 12 µ kBit/s NRZ Description Setting for nominal frequency ...

Page 59

... Frequency 868.3 MHz +50 kHz -50 kHz Frequency tolerance @ 868MHz +/- 3kHz +/- 5kHz +/- 1.5kHz +/- 9.5kHz Frequency tolerance @ 868MHz +/- 8kHz +/- 18kHz +/- 5kHz +/- 1kHz +/- 32kHz 59 TDA5250 D2 Version 1.7 Application Rel. tolerance +/- 3.5ppm +/- 6ppm +/- 1.5ppm +/- 11ppm Rel. tolerance +/- 9ppm +/- 21ppm +/- 6ppm +/- 1.5ppm +/- 37.5ppm 2007-02-26 ...

Page 60

... bits of the LPF register (subaddress 03H). Table 3-9 3dB cutoff frequencies I/Q Filter Data Sheet nominal f in kHz -3dB (programmable) not used 350 250 200 150 (default) 100 50 not used 60 TDA5250 D2 Version 1.7 Application resulting effective channel bandwidth in kHz 700 500 400 300 200 100 2007-02-26 ...

Page 61

... Data Filter The Data-Filter should be set to values corresponding to the bandwidth of the transmitted Data signal via the bits of the LPF register (subaddress 03H). Data Sheet kHz] effective channel bandwidth f 61 TDA5250 D2 Version 1.7 Application 50kHz 100kHz 150kHz 200kHz 250kHz 350kHz iq_filter_curve.wmf ...

Page 62

... I- and Q-channel RSSI-signals are summed to the nominal RSSI signal Filter Filter f g Figure 3-22 Limiter and Pinning Data Sheet Limiter Q Limiter 62 TDA5250 D2 Version 1.7 Application nominal f in kHz -3dB 5 7 (default 102 C RSSI 29 RSSI 31 Quadr. 37k Corr. Σ Quadr. Corr. limiter input.wmf 2007-02-26 ...

Page 63

... Figure 3-23 Limiter frequency characteristics Data Sheet f3dB upper limit 100 IQ Filter 220 - ll - 470 - 2200 - 3dB IQ Filter 63 TDA5250 D2 Version 1.7 Application Comment setup time not guaranteed setup time not guaranteed Eval Board f f 3dB Limiter limiter_char.wmf 2007-02-26 ...

Page 64

... Data Slicer - Slicing Level The data slicer is an analog-to-digital converter necessary to generate a threshold value for the negative comparator input (data slicer). The TDA5250 offers an RC integrator and a peak detector which can be selected via logic. Independent of the choice, the peak detector outputs are always active ...

Page 65

... Table 3-13 Sub Address 00H: CONFIG Bit Function D15 SLICER The TDA5250 has two peak detectors built in, one for positive peaks in the data stream and the other for the negative ones. Necessary external components: Data Sheet Description 0= LP, 1= Peak Detector - Pin12: C ...

Page 66

... Figure 3-27 Peak Detector timing Data Sheet τ = 100 Ω ⋅ posPkD p τ = 100 Ω ⋅ negPkD τ Signal τ negPkD 66 TDA5250 D2 Version 1.7 Application n posPkD Pos. Peak Detector (pin13) Threshold SLC(pin14) Neg. Peak Detector (pin12) t SLC_PkD.wmf [3 – 32] [3 – 33] PkD_timing.wmf 2007-02-26 ...

Page 67

... L2 3.6.3 Peak Detector - Analog output signal The TDA5250 data output can be digital (pin 28 analog form by using the peak detector output and changing some settings. To get an analog data output the slicer must be set to lowpass mode (Reg. 0, D15 = and the peak detector capacitor at pin has to be changed to a resistor of about 47kOhm. ...

Page 68

... RF power level, which can be set in register 08h in form of the RSSI threshold voltage. Thus for using the data valid detection FSK modulation is recommended. Data Sheet Threshold (pin14) 2,2ms Power Down Power ON 68 TDA5250 D2 Version 1.7 Application PKD_PWDN.wmff Data Signal Peak Detector Power ON PkD_PWDN3.wmf 2007-02-26 ...

Page 69

... Data reset Gate time count comp. comp. start of conversion possible start of next conversion Data reset Gate time count comp. comp. ready* no possible start of next conversion start of conversion because of Single Shot Mode 69 TDA5250 D2 Version 1.7 Application t t reset t count t comp ready* t Frequ_Detect_Timing_continuous.wmf ...

Page 70

... We set the thresholds to +-10% and get: T1= 0,225ms and T2= 0,275ms The thresholds TH1 and TH2 are calculated with following formulas Data Sheet T 2*T DATA possible GATE 1 0 2*T2 2*T1 possible GATE ⋅ 0,5ms 2kbit/s f clk [3 – 37] = ⋅ TH1 clk = ⋅ [3 – 38] TH2 TDA5250 D2 Version 1.7 Application window_count_timing.wmf [3 – 36] 2007-02-26 ...

Page 71

... The values have to be written into the D0 to D15 bits of the ON_TIME and OFF_TIME registers (subaddresses 04H and 05H). Data Sheet TH1~ 1017= 001111111001 TH2~ 1243= 010011011011 RSSI threshold voltage ⋅ 1.2V = 0,055s 32300Hz RC 71 TDA5250 D2 Version 1.7 Application – 39] − – 40] [3 – 41 2007-02-26 ...

Page 72

... One possible Solution 15ms 135ms ON OFF Data Sheet b b Data Data Data Data 50ms 50ms 400ms Preamble Data Syncronisation Preamble 72 TDA5250 D2 Version 1.7 Application t [ms] t [ms] t [ms] data_timing011.wmf 2007-02-26 ...

Page 73

... Receiver until Data completed Interrupt due PwdDD Data Data Data 50ms 15ms 135ms µP enables Receiver until Data completed Interrupt due PwdDD ... Receiver enabled 73 TDA5250 D2 Version 1.7 Application Data t [ms] Data t [ms] Data t [ms] data_timing021.wmf 2007-02-26 ...

Page 74

... The resulting I/Q signals are applied to the SMIQ to generate a ASK (OOK) spectrum at the desired RF frequency. Data is demodulated by the TDA5250 and then sent back to the AMIQ to be compared with the originally sent data. The bit error rate is calculated by the bit error rate equipment inside the AMIQ. ...

Page 75

... Figure 3-37 shows that ASK as well as FSK sensitivity is in the range of -110 to -111dBm at 20°C ambient temperature for a BER of 2E-3. Notice that the sensitivity variation in this temperature range of -40 °C to +85 °C is only about 1 dB. Data Sheet 75 TDA5250 D2 Version 1.7 Application BER_Temp_5V.wmf 2007-02-26 ...

Page 76

... Please notice the tiny sensitivity changes of 1.5 to 2.5dB, when variing the supply voltage. 3.10.4 Datarates and Sensitivity The TDA 5250 can handle datarates up to 64kbit/s, as can be taken from the following figure. (see Section 4.1.4) Data Sheet 76 TDA5250 D2 Version 1.7 Application BER_VCC_20°C..wmf 2007-02-26 ...

Page 77

... B in Figure 3-40). In this case one of the peaks of the FSK-spectrum lies in the DC-blocking notch of the baseband limiters. Figure 3-40 BER Frequency Offset Data Sheet 77 TDA5250 D2 Version 1.7 Application BER_Datarate.wmf BER_FrequOffset_FSK_3V..wmf 2007-02-26 ...

Page 78

... Operating Mode Data Sheet Value IFX-Board 150kHz 7kHz 470Hz 47nF RC 10nF 4.5pF 868.3MHz 2.5pF +50kHz 1.5pF -50kHz HIGH HIGH +10dBm 2.6ms 2.2nF RSSI 10ms 100ms 1MHz 1MHz - - bipolar off - Jumper - Jumper PWDN Jumper removed Slave 78 TDA5250 D2 Version 1.7 Application Comment 2007-02-26 ...

Page 79

... ESD-HBM Symbol Limit Values min max V 2 868 870 RX f 868 870 TX 79 TDA5250 D2 Version 1.7 Reference Unit Remarks max 5.8 V °C °C 114 K/W +1.5 kV CDM according EIA/JESD22-C101 +2.0 kV HBM according EIA/JESD22-A114-B (1.5k Ω , 100pF) V HBM according EIA/JESD22-A114-B (1.5k Ω ...

Page 80

... RSSI t 3.35 Data_Valid P -48dBm 1dB P -32dBm 1dB_low V 50 BL_1MHz P - TDA5250 D2 Version 1.7 Reference = 2.1 ... 5.5 V VCC Unit Test Conditions mA 3V, FSK, Default mA 5V, FSK, Default mA 3V, ASK, Default mA 5V, ASK, Default dBm FSK@50kHz, 4kBit/s Manch. Data, Default 7kHz datafilter, 100kHz IQ filter dBm ASK, 4kBit/s Manch ...

Page 81

... CLKSU t 0.77 1.1 1.43 ms TXSU P clock P -66 1st P -40 2nd P -50 3rd 81 TDA5250 D2 Version 1.7 Reference = 2.1 ... 5.5 V VCC Unit Test Conditions mA 2.1V, high power mA 3V, high power mA 5V, high power dBm 2.1V, high power dBm 3V, high power dBm 5V, high power mA 2 ...

Page 82

... V 0.5 1 1.6 cc-tune,RX V 0.5 1.1 1.6 cc-tune,TX 82 TDA5250 D2 Version 1.7 Reference = 2.1 ... 5.5 V Test Conditions uA 3V, 32kHz clock on uA 5V, 32kHz clock on uA 3V, CONFIG9=1 uA 5V, CONFIG9=1 kHz ms IFX Board with Crystal Q1 as specified in Section 4.4 ...

Page 83

... BUF BusData BusCLK H D. HIG H EN pulsed or t mandatory low SU. ENAS DA t SU. ENAS DA 2 Figure 4 Bus Timing 3-wire Bus Timing B U S_M S_E Figure 4-2 3-wire Bus Timing Data Sheet HD. DAT .DAT SU. STA TDA5250 D2 Version 1.7 Reference D. SU SU. ENA SDA 2007-02-26 ...

Page 84

... -0 0 400 SLC t 1.3 BUF t 0.6 HO.STA = 25 ° TDA5250 D2 Version 1.7 = 2.1 ... 5.5 V Vdd Unit Test Conditions 25 kBaud PRBS9, Manch.@+10dBm 64 kBaud PRBS9, Manch.@-5dBm 40 kBaud PRBS9, Manch.@+10dBm @50kHz dev. 64 kBaud PRBS9, Manch. 64 kBaud PRBS9, Manch.@100kHz dev = Isink=800uA Isink=3mA ...

Page 85

... LOW t 0.6 HIGH t 0.6 SU.STA t 0 HD.DAT t 100 SU.DAT 20+ 300 0.6 SU.STO C 400 b t 0.6 SU.SCL EN t 0.6 WHEN 85 TDA5250 D2 Version 1.7 Reference Unit Test Conditions µs V =5V dd µ µs only I C mode µs only I C mode V =5V dd ...

Page 86

... Test Circuit The device performance parameters marked with evaluation board (IFX board). Figure 4-3 Schematic of the Evaluation Board Data Sheet in Section 4.1.3 were measured on an Infineon 86 TDA5250 D2 Version 1.7 Reference TDA5250_v42.schematic.pdf 2007-02-26 ...

Page 87

... In case of reproduction please bear in mind that this may not be suitable for all automatic soldering processes. Note 2: Please keep in mind not to layout the CLKDIV line directly in the neighborhood of the crystal and the associated components. Data Sheet 87 TDA5250 D2 Version 1.7 Reference TDA5250_v42_layout.pdf 2007-02-26 ...

Page 88

... TDA5250 D2 Version 1.7 Reference Tolerance +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% +/-5% ...

Page 89

... SIMID 0603-C (EPCOS) 12nH SIMID 0603-C (EPCOS) 8.2nH SIMID 0603-C (EPCOS) TDA5250 D2 PTSSOP38 ILQ74 SFH6186 18.08958MHz Telcona: C0=2,1pF 1-pol. BC847B SOT-23 (Infineon) BAR63-02W SCD-80 (Infineon) SMA-socket SubD 25p. 89 TDA5250 D2 Version 1.7 Reference Tolerance 0603 +/-10% 0603 +/-0,1pF 0603 +/-0,1pF 0603 +/-1% 0603 +/-10% 0603 +/-10% 0603 +/-10% 0603 ...

Page 90

... Table 3-6 Default oscillator settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 3-7 Internal Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table 3-8 Default Setup (without internal tuning & without Pin21 usage Table 3-9 3dB cutoff frequencies I/Q Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Sheet 90 TDA5250 D2 Version 1.7 page 12 page 19 page 19 page 22 page 23 page 24 page 25 page 26 page 26 ...

Page 91

... Table 4-3 AC/DC Characteristics with °C, VVCC = 2.1 ... 5 Table 4-4 AC/DC Characteristics with °C, VVCC = 2.1 ... 5 Table 4-5 Digital Characteristics with °C, VVdd = 2.1 ... 5 Table 4-6 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data Sheet 91 TDA5250 D2 Version 1.7 page 62 page 63 page 64 page 65 page 78 page 79 page 79 page 80 ...

Page 92

... Figure 3-20 I/Q Filter Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page Figure 3-21 IQ Filter and frequency characteristics of the receive system page Figure 3-22 Limiter and Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page Figure 3-23 Limiter frequency characteristics page Figure 3-24 Typ. RSSI Level (Eval Board) @ page Data Sheet 92 TDA5250 D2 Version 1 ...

Page 93

... Figure 3-39 Datarates and Sensitivity page Figure 3-40 BER Frequency Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page Figure 4-1 I2C Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page Figure 4-2 3-wire Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page Figure 4-3 Schematic of the Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . page Figure 4-4 Layout of the Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . page Data Sheet 93 TDA5250 D2 Version 1 ...

Page 94

... Absolute Maximum Ratings 80 AC/DC Characteristics 10, 39 Application E 79 Electrical Data F 9 Features Functional Block Description 18 Functional Block Diagram 11 Functional Description Data Sheet O 79 Operating Range Overview P Package Outlines Pin Configuration Pin Definitions and Functions Product Description R 19 Reference S Standards 94 TDA5250 D2 Version 1 2007-02-26 ...

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