MRF89XA-I/MQ Microchip Technology, MRF89XA-I/MQ Datasheet - Page 15

• Manufacturer Part Number: MRF89XA-I/MQ
• Description: TXRX ISM SUB-GHZ ULP 32QFN
• Manufacturer: Microchip Technology

Specifications of MRF89XA-I/MQ

• Package / Case: 32-WFQFN Exposed Pad
• Frequency: 863MHz ~ 870MHz, 902MHz ~ 928MHz, 950MHz ~ 960MHz
• Data Rate - Maximum: 200kbps
• Modulation Or Protocol: FSK, OOK
• Applications: ISM
• Power - Output: 12.5dBm
• Sensitivity: -113dBm
• Voltage - Supply: 2.1 V ~ 3.6 V
• Current - Receiving: 3mA
• Current - Transmitting: 25mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 863 MHz to 870 MHz, 902 MHz to 928 MHz, 950 MHz to 960 MHz
• Interface Type: SPI
• Noise Figure: - 112 dBc
• Output Power: - 8.5 dBm, + 12.5 dBm
• Operating Supply Voltage: 2.1 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Data Rate: 256 Kbps
• Maximum Supply Current: 25 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 2-2:
 2010 Microchip Technology Inc.
Packet Handling Parameters Configuration Registers: Size – 4 Bytes, Start Address – 28
Sl. No.
29.
30.
31.
32.
Register
Address
28
29
30
31
CONFIGURATION/CONTROL/STATUS REGISTER DESCRIPTION (CONTINUED)
PLOADREG
NADDSREG
PKTCREG
FCRCREG
Register
Name
Payload Configuration Register
Node Address Set Register
Packet Configuration Register
FIFO CRC Configuration Register
Advance Information
Register Description
Enable Manchester
encoding/decoding, payload length
Node’s local address for filtering of
received packets
Packet format, size of the preamble,
whitening, CRC on/off, address
filtering of received packets, CRC
status
FIFO auto-clear (if CRC failed), FIFO
access
Related Control Functions
MRF89XA
DS70622A-page 15