MCF5216CVF66 Freescale Semiconductor, MCF5216CVF66 Datasheet - Page 628

IC MPU 32BIT COLDF 256-MAPBGA

MCF5216CVF66

Manufacturer Part Number
MCF5216CVF66
Description
IC MPU 32BIT COLDF 256-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xr
Datasheet

Specifications of MCF5216CVF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
142
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-MAPBGA
Controller Family/series
ColdFire
Ram Memory Size
64KB
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of Pwm Channels
8
Operating Temperature Range
-40°C To +85°C
No. Of Pins
256
Rohs Compliant
No
Package
256MA-BGA
Device Core
ColdFire
Family Name
MCF521x
Maximum Speed
66 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
142
Interface Type
QSPI/UART/I2C/CAN
On-chip Adc
8-chx10-bit
Number Of Timers
8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Debug Support
Table 30-6
Table 30-7
30.4.4
The CSR defines the debug configuration for the processor and memory subsystem and contains status
information from the breakpoint logic. CSR is write-only from the programming model. It can be read
from and written to through the BDM port. CSR is accessible in supervisor mode as debug control register
0x00 using the WDEBUG instruction and through the BDM port using the
commands.
30-10
DRc[4–0]
31–0 Address High address. Holds the 32-bit address marking the upper bound of the address breakpoint range.
Bits
31–0
Bits
Reset
Reset
R/W
Field
Field MAP TRC EMU
R/W R/W R/W R/W
1
describes ABLR fields.
Address Low address. Holds the 32-bit address marking the lower bound of the address breakpoint range.
describes ABHR fields.
Configuration/Status Register (CSR)
Name
Name
31
15
Breakpoints for specific addresses are programmed into ABLR.
14
BSTAT
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
13
Figure 30-7. Configuration/Status Register (CSR)
28
12
DDC
R/W
Table 30-7. ABHR Field Description
Table 30-6. ABLR Field Description
FOF TRG HALT BKPT
27
11
UHE
R/W
26
10
R
0000_0000_0000_0000
0000_0000_0000_0000
0000_0000_0000_0000
25
9
BTB
R/W
24
8
Description
Description
23
R
7
NPL
R/W R/W R/W
6
HRL
IPI
5
SSM
20
4
RDMREG
19
3
Freescale Semiconductor
and
17
WDMREG
IPW
R/W
16
0

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