AT91SAM7S256C-MU Atmel, AT91SAM7S256C-MU Datasheet - Page 573

IC ARM7 MCU 32BIT 256K 64-QFN

AT91SAM7S256C-MU

Manufacturer Part Number
AT91SAM7S256C-MU
Description
IC ARM7 MCU 32BIT 256K 64-QFN
Manufacturer
Atmel
Series
AT91SAMr

Specifications of AT91SAM7S256C-MU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT91
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
32
Number Of Timers
5
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
AT91SAM7S256-MU
AT91SAM7S256-MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S256C-MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Table 37-22. SPI Timings
Notes:
6175K–ATARM–30-Aug-10
Symbol
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
0
1
2
3
4
5
6
7
8
9
10
11
1. 3.3V domain: V
2. 1.8V domain: V
3. t
CPMCK
Parameter
MISO Setup time before SPCK rises (master)
MISO Hold time after SPCK rises (master)
SPCK rising to MOSI Delay (master)
MISO Setup time before SPCK falls (master)
MISO Hold time after SPCK falls (master)
SPCK falling to MOSI Delay (master)
SPCK falling to MISO Delay (slave)
MOSI Setup time before SPCK rises (slave)
MOSI Hold time after SPCK rises (slave)
SPCK rising to MISO Delay (slave)
MOSI Setup time before SPCK falls (slave)
MOSI Hold time after SPCK falls (slave)
: Master Clock period in ns.
VDDIO
VDDIO
Figure 37-7. SPI Slave mode with (CPOL = NCPHA = 0) or (CPOL= NCPHA= 1)
Note that in SPI master mode the ATSAM7S512/256/128/64/321/32 does not sample the data
(MISO) on the opposite edge where data clocks out (MOSI) but the same edge is used as
shown in
SPCK
MISO
MOSI
from 3.0V to 3.6V, maximum external capacitor = 40 pF.
from 1.65V to 1.95V, maximum external capacitor = 20 pF.
Figure 37-4
and
Figure
SPI
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
3.3V domain
1.8V domain
Conditions
37-5.
9
AT91SAM7S Series Preliminary
SPI
10
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
(1)
(2)
28.5 + (t
26.5 + (t
38 + (t
44 + (t
SPI
11
Min
CPMCK
CPMCK
CPMCK
CPMCK
0
0
0
0
2
3
3
2
3
3
3
2
)/2
)/2
)/2
)/2
(3)
(3)
(3)
(3)
Max
2.5
28
44
28
43
2
7
2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
573

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