AT91SAM7S256C-MU Atmel, AT91SAM7S256C-MU Datasheet - Page 110
AT91SAM7S256C-MU
Manufacturer Part Number
AT91SAM7S256C-MU
Description
IC ARM7 MCU 32BIT 256K 64-QFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91SAM7S16-MU.pdf
(51 pages)
2.AT91SAM7S16-MU.pdf
(779 pages)
3.AT91SAM7S256C-MU.pdf
(2 pages)
Specifications of AT91SAM7S256C-MU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
AT91
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
SPI, TWI, USART, USB
Maximum Clock Frequency
55 MHz
Number Of Programmable I/os
32
Number Of Timers
5
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
AT91SAM7S256-MU
AT91SAM7S256-MU
AT91SAM7S256-MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S256C-MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 110 of 779
- Download datasheet (11Mb)
19.2.4.1
110
AT91SAM7S Series Preliminary
Flash Programming
Figure 19-5. Command State Chart
In order to guarantee valid operations on the Flash memory, the field Flash Microsecond Cycle
Number (FMCN) in the Flash Mode Register MC_FMR must be correctly programmed (see
Flash Mode Register” on page
Several commands can be used to program the Flash.
The Flash technology requires that an erase must be done before programming. The entire
memory plane can be erased at the same time, or a page can be automatically erased by clear-
ing the NEBP bit in the MC_FMR register before writing the command in the MC_FCR register.
By setting the NEBP bit in the MC_FMR register, a page can be programmed in several steps if
it has been erased before (see
Write FCMD and PAGENB in MC_FCR
Check if PROGE flag set
Read Status: MC_FSR
Check if FRDY flag set
Read Status: MC_FSR
Check if FRDY flag set
Check if LOCKE flag set
Command Successful
Yes
Yes
No
No
116).
Figure
19-6).
No
No
Yes
Yes
Locking region violation
Bad keyword violation and/or Invalid command
6175K–ATARM–30-Aug-10
“MC
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