ADM1062ASUZ Analog Devices Inc, ADM1062ASUZ Datasheet - Page 30

IC SUPERVISOR/SEQUENCER 48-TQFP

ADM1062ASUZ

Manufacturer Part Number
ADM1062ASUZ
Description
IC SUPERVISOR/SEQUENCER 48-TQFP
Manufacturer
Analog Devices Inc
Type
Sequencerr
Datasheet

Specifications of ADM1062ASUZ

Number Of Voltages Monitored
10
Output
Programmable
Voltage - Threshold
Adjustable/Selectable
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP, 48-VQFP
For Use With
EVAL-ADM1062TQEBZ - BOARD EVALUATION FOR ADM1062TQEVAL-ADM1062LFEBZ - BOARD EVALUATION FOR ADM1062LF
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Reset
-
Reset Timeout
-

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ADM1062
SMBus PROTOCOLS FOR RAM AND EEPROM
The ADM1062 contains volatile registers (RAM) and non-
volatile registers (EEPROM). User RAM occupies Address 0x00
to Address 0xDF; the EEPROM occupies Address 0xF800 to
Address 0xFBFF.
Data can be written to and read from both the RAM and the
EEPROM as single data bytes. Data can be written only to unpro-
grammed EEPROM locations. To write new data to a programmed
location, the location contents must first be erased. EEPROM
erasure cannot be done at the byte level. The EEPROM is arranged
as 32 pages of 32 bytes each, and an entire page must be erased.
Page erasure is enabled by setting Bit 2 in the UPDCFG register
(Address 0x90) to 1. If this bit is not set, page erasure cannot
occur, even if the command byte (0xFE) is programmed across
the SMBus.
WRITE OPERATIONS
The SMBus specification defines several protocols for different
types of read and write operations. The following abbreviations
are used in Figure 42 to Figure 50:
The ADM1062 uses the following SMBus write protocols.
Send Byte
In a send byte operation, the master device sends a single
command byte to a slave device, as follows:
1.
2.
3.
4.
5.
6.
In the ADM1062, the send byte protocol is used for two purposes:
S = Start
P = Stop
R = Read
W = Write
A = Acknowledge
A = No acknowledge
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an acknowledge (ACK)
on SDA.
The master sends a command code.
The slave asserts an ACK on SDA.
The master asserts a stop condition on SDA, and the
transaction ends.
To write a register address to the RAM for a subsequent single
byte read from the same address, or for a block read or a
block write starting at that address, as shown in Figure 42.
Figure 42. Setting a RAM Address for Subsequent Read
S
1
ADDRESS
SLAVE
2
W
3
A
(0x00 TO 0xDF)
ADDRESS
RAM
4
A
5
P
6
Rev. B | Page 30 of 36
Write Byte/Word
In a write byte/word operation, the master device sends a
command byte and one or two data bytes to the slave device,
as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The master asserts a stop condition on SDA to end
In the ADM1062, the write byte/word protocol is used for three
purposes:
To erase a page of EEPROM memory. EEPROM memory
can be written to only if it is unprogrammed. Before writing
to one or more EEPROM memory locations that are already
programmed, the page(s) containing those locations must
first be erased. EEPROM memory is erased by writing a
command byte.
The master sends a command code telling the slave device
to erase the page. The ADM1062 command code for a page
erasure is 0xFE (1111 1110). Note that for a page erasure to
take place, the page address must be given in the previous
write word transaction (see the Write Byte/Word section).
In addition, Bit 2 in the UPDCFG register (Address 0x90)
must be set to 1.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an ACK on SDA.
The master sends a command code.
The slave asserts an ACK on SDA.
The master sends a data byte.
The slave asserts an ACK on SDA.
The master sends a data byte or asserts a stop condition.
The slave asserts an ACK on SDA.
the transaction.
To write a single byte of data to the RAM. In this case, the
command byte is RAM Address 0x00 to RAM Address 0xDF,
and the only data byte is the actual data, as shown in Figure 44.
As soon as the ADM1062 receives the command byte,
page erasure begins. The master device can send a stop
command as soon as it sends the command byte. Page
erasure takes approximately 20 ms. If the ADM1062 is
accessed before erasure is complete, it responds with a no
acknowledge (NACK).
S
1
S
1
ADDRESS
SLAVE
ADDRESS
SLAVE
Figure 44. Single Byte Write to the RAM
2
2
Figure 43. EEPROM Page Erasure
W A
3
W
(0x00 TO 0xDF)
A
ADDRESS
3
RAM
4
COMMAND
(0xFE)
BYTE
4
5
A
DATA
6
A
5
A
7
6
P
8
P

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