MAXQ7665BATM+ Maxim Integrated Products, MAXQ7665BATM+ Datasheet - Page 7

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MAXQ7665BATM+

Manufacturer Part Number
MAXQ7665BATM+
Description
IC MCU-BASED DAS 16BIT 48-TQFN
Manufacturer
Maxim Integrated Products
Series
MAXQ™r
Datasheet

Specifications of MAXQ7665BATM+

Core Processor
RISC
Core Size
16-Bit
Speed
8MHz
Connectivity
CAN, LIN, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
8
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
256 x 16
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.25 V
Data Converters
A/D 8x12b, D/A 1x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
ELECTRICAL CHARACTERISTICS (continued)
(AV
Typical values are at T
SUPPLY VOLTAGE SUPERVISORS AND BROWNOUT DETECTION
DV
Rising Threshold
DV
Brownout Reset Falling Threshold
Software-Selectable DV
Voltage-Supervisor Brownout
Interrupt Falling Threshold
DV
Brownout Interrupt Threshold
Voltage-Supervisor Hysteresis
DV
Brownout Reset Falling Threshold
Voltage Monitor Range
DV
RESET Hold Time
CAN INTERFACE
CAN Baud Rate
CANCLK Mean Frequency Error
CANCLK Total Frequency Error
HIGH-FREQUENCY CRYSTAL OSCILLATOR
Clock Frequency
Crystal Oscillator Startup Time
External Clock Input Duty Cycle
DD
DD
DD
DDIO
DD
DD
= DV
Voltage-Supervisor Reset
Voltage-Supervisor
Brownout-Interrupt to
Ramp-Up Rate
Voltage-Supervisor
PARAMETER
DDIO
= +5.0V, DV
_______________________________________________________________________________________
A
= +25°C.) (Note 1)
DD
DD
= +3.3V, f
SYMBOL
16-Bit RISC Microcontroller-Based
V
V
V
VDBR
VIOBI
VDBI
Smart Data-Acquisition Systems
SYSCLK
Power-on default, DV
(Note 7)
DV
firmware selectable,
measured with CPU
active at 8MHz
(Note 8)
DV
firmware selectable,
measured with CPU
active at 8MHz
(Note 9)
DV
firmware selectable,
measured with CPU
active at 8MHz
(Note 10)
DV
Voltage difference between V
V
before reset asserted, VDBI = 11b and
VDBR = 10b
DV
DV
DV
between +2.7V and +3.0V
After DV
trip threshold
CANCLK = 8MHz
50ppm external crystal error, 8MHz crystal
50ppm external crystal error, 8MHz crystal,
clock divided and measured over 500µs
interval, mean plus peak cycle jitter
Using external crystal
External clock source
8MHz crystal
Ratio high-to-low or low-to-high
VDBR
= 8MHz, V
DD
DD
DDIO
DD
DD
DDIO
DD
, DV
voltage falling,
voltage falling,
must rise faster than this rate
, time allowing software clean-up
DD
voltage falling,
DDIO
rises above the V
REFDAC
CONDITIONS
= V
DD
REFADC
voltage rising
VDBR = 00b
(default)
VDBR = 01b
VDBR = 10b
VDBR = 11b
VDBI = 00b
(default)
VDBI = 01b
VDBI = 10b
VDBI = 11b
VIOBI = 00b
(default)
VIOBI = 01b
VIOBI = 10b
VIOBI = 11b
VDBR
VDBI
= +5V, T
and
voltage
A
= T
MIN
2.70
2.70
2.77
2.84
2.91
2.77
2.84
2.91
2.99
4.25
4.30
4.35
4.40
MIN
155
1.0
7.6
7.6
45
35
0
to T
MAX
< 0.5
TYP
60
10
16
1
, unless otherwise noted.
MAX
2.99
2.99
3.06
3.13
3.20
3.06
3.13
3.20
3.27
4.74
4.79
4.84
4.89
5.25
8.12
8.12
3.6
55
1
UNITS
mV/ms
Mbps
ppm
MHz
mV
ms
ms
%
%
%
V
V
V
V
V
7

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