MAXQ7665BATM+ Maxim Integrated Products, MAXQ7665BATM+ Datasheet - Page 26

• Manufacturer Part Number: MAXQ7665BATM+
• Description: IC MCU-BASED DAS 16BIT 48-TQFN
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ7665BATM+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 8
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 256 x 16
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.25 V
• Data Converters: A/D 8x12b, D/A 1x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16-Bit RISC Microcontroller-Based
Smart Data-Acquisition Systems
The basic functions covered by the CAN controller
include the use of 11-bit standard or 29-bit extended
acceptance identifiers, as programmed by the µC for
each message center, as shown in Figure 10. The CAN
unit provides storage for up to 15 messages, with the
standard 8-byte data field, in each message.
Each of the first 14 message centers is programmable
in either transmit or receive mode. Message center 15
is designed as a receive-only message center with a
buffer FIFO arrangement to help prevent the inadver-
Figure 10. CAN 0 Controller Block Diagram
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CAN 0 CONTROLLER BLOCK DIAGRAM
DUAL PORT MEMORY
MESSAGE CENTERS 1–15
CONTROL/STATUS/MASK REGISTERS
MEDIA ARBITRATION 0–1 EXT GLOBAL MASK 0–3
MESSAGE CENTER 1
MESSAGE CENTER 2
MESSAGE CENTER 14
MESSAGE CENTER 15
MEDIA ID MASK 0–1
BUS TIMING 0–1
ARBITRATION 0–3
ARBITRATION 0–3
ARBITRATION 0–3
ARBITRATION 0–3
FORMAT
FORMAT
FORMAT
FORMAT
CAN Functional Description
DATA 0–7
DATA 0–7
DATA 0–7
DATA 0–7
STD GLOBAL MASK 0–1
MSG15 MASK 0–3
CAN PROCESSOR
CAN 0 PERIPHERAL REGISTERS
tent loss of data when the µC is busy and is not
allowed time to retrieve the incoming message prior to
the acceptance of a second message into message
center 15. Message center 15 also utilizes an indepen-
dent set of mask registers and identification registers,
which are only applied once an incoming message has
not been accepted by any of the first 14 message cen-
ters. A second filter test is also supported for all mes-
sage centers (1–15) to allow the CAN controller to use
two separate 8-bit media masks and media arbitration
fields to verify the contents of the first 2 bytes of data of
CAN 0 TRANSMIT ERROR
MAXQ7665A–MAXQ7665D
CAN 0 RECEIVE ERROR
CAN 0 MESSAGE 1–15
CONTROL REGISTERS
CAN 0 DATA POINTER
8-BIT
CAN 0 DATA BUFFER
Rx
CAN INTERRUPT
COUNTER
COUNTER
SOURCES
8-BIT
CHECK
Tx
CRC
BUS ACTIVITY WAKE-UP
DESTUFF
GENERATE
BIT
PROTOCOL
CRC
CAN
FSM
CAN 0 OPERATION CONTROL
CAN 0 INTERRUPT REGISTER
CAN 0 TRANSMIT MSG ACK
CAN 0 CONTROL REGISTER
CAN 0 RECEIVE MSG ACK
CAN 0 STATUS REGISTER
SHIFT
STUFF
Rx
BIT
TIMING
SHIFT
BIT
Tx
CANTXD
CANRXD