DS89C420-MNL Maxim Integrated Products, DS89C420-MNL Datasheet - Page 35

• Manufacturer Part Number: DS89C420-MNL
• Description: IC MCU ULTRA 33MHZ HP 40-DIP
• Manufacturer: Maxim Integrated Products
• Series: 89Cr

Specifications of DS89C420-MNL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

regardless of the individual interrupt enable settings. The power-fail interrupt is controlled by its individual enable
only.
The interrupt enables and priorities are functionally identical to those of the 80C52, except that the DS89C420
supports five levels of interrupt priorities instead of the original two.
INTERRUPT PRIORITY
There are five levels of interrupt priority: level 4 to 0. The highest interrupt priority is level 4, which is reserved for
the power-fail interrupt. All other interrupts have individual priority bits in the interrupt priority registers to allow each
interrupt to be assigned a priority level from 3 to 0. The power-fail interrupt always has the highest priority if it is
enabled. All interrupts also have a natural hierarchy. In this manner, when a set of interrupts has been assigned the
same priority, a second hierarchy determines which interrupt is allowed to take precedence. The natural hierarchy
is determined by analyzing potential interrupts in a sequential manner with the order listed in
Table 11. Interrupt Summary
*Cleared automatically by hardware when the service routine is vectored to.
**If the interrupt is edge triggered, cleared automatically by hardware when the service routine is vectored to. If the interrupt is level triggered,
The processor indicates that an interrupt condition occurred by setting the respective flag bit. This bit is set
regardless of whether the interrupt is enabled or disabled. Unless marked in Table 11, all these flags must be
cleared by software.
TIMER/COUNTERS
Three 16-bit timers are incorporated in the DS89C420. All three timers can be used as either counters of external
events, where 1-to-0 transitions on a port pin are monitored and counted, or timers that count oscillator cycles.
Table 12
Timers 0 and 1 both have three modes of operations. They can each be used as a 13-bit timer/counter, a 16-bit
timer/counter, or an 8-bit timer/counter with auto-reload. Timer 0 has a fourth operating mode as two 8-bit
External Interrupt 0
External Interrupt 1
External Interrupt 2
External Interrupt 3
External Interrupt 4
External Interrupt 5
Timer 0 Overflow
Timer 1 Overflow
Timer 2 Overflow
the flag follows the state of the pin.
INTERRUPT
Serial Port 0
Serial Port 1
Power-Fail
Watchdog
summarizes the timer functions.
VECTOR
0Bh
1Bh
2Bh
3Bh
4Bh
5Bh
33h
03h
13h
23h
43h
53h
63h
NATURAL
(Highest)
(Lowest)
ORDER
10
11
12
0
1
2
3
4
5
6
7
8
9
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WDIF (WDCON.3)
EXF2 (T2CON.6)
RI_0 (SCON0.0)
RI_1 (SCON1.0)
PFI (WDCON.4)
TI_0 (SCON0.1)
TI_1 (SCON1.1)
TF2 (T2CON.7)
IE0 (TCON.1)**
TF0 (TCON.5)*
IE1 (TCON.3)**
TF1 (TCON.7)*
IE2 (EXIF.4)
IE3 (EXIF.5)
IE4 (EXIF.6)
IE5 (EXIF.7)
FLAG
EPFI(WDCON.5)
EWDI (EIE.4)
EX2 (EIE.0)
EX3 (EIE.1)
EX4 (EIE.2)
EX5 (EIE.3)
EX0 (IE.0)
ET0 (IE.1)
EX1 (IE.2)
ET1 (IE.3)
ES0 (IE.4)
ET2 (IE.5)
ES1 (IE.6)
ENABLE
Table
PRIORITY CONTROL
MPWDI (EIP1.4)
LPWDI (EIP0.4)
MPX2 (EIP1.0)
MPX3 (EIP1.1)
MPX4 (EIP1.2)
MPX5 (EIP1.3)
LPX2 (EIP0.0)
LPX3 (EIP0.1)
LPX4 (EIP0.2)
LPX5 (EIP0.3)
MPX0 (IP1.0)
MPX1 (IP1.2)
MPS0 (IP1.4)
MPS1 (IP1.6)
MPT0 (IP1.1)
MPT1 (IP1.3)
MPT2 (IP1.5)
LPX0 (IP0.0)
LPT0 (IP0.1)
LPX1 (IP0.2)
LPT1 (IP0.3)
LPS0 (IP0.4)
LPT2 (IP0.5)
LPS1 (IP0.6)
11.
N/A