DS89C420-MNL Maxim Integrated Products, DS89C420-MNL Datasheet - Page 33

IC MCU ULTRA 33MHZ HP 40-DIP

DS89C420-MNL

Manufacturer Part Number
DS89C420-MNL
Description
IC MCU ULTRA 33MHZ HP 40-DIP
Manufacturer
Maxim Integrated Products
Series
89Cr
Datasheet

Specifications of DS89C420-MNL

Core Processor
8051
Core Size
8-Bit
Speed
33MHz
Connectivity
EBI/EMI, SIO, UART/USART
Peripherals
Power-Fail Reset, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-

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Figure 13. Page Mode 1, External Data Memory Access (Pages = 01, Stretch = 1, CD = 10)
Figure 13
PAGES1:PAGES0 = 01. The stretch cycle shown is for a stretch value of 1 and is coincident with a page miss.
Note that the first stretch value does not result in adding four system clocks to the RD/WR control signals. This is
because the first stretch uses one system clock to create additional setup and one system clock to create
additional hold time.
RD / WR
RD / WR
RD / WR
XTAL1
PSEN
Port 0
Port 2
PSEN
Port 0
Port 2
PSEN
Port 0
Port 2
ALE
ALE
ALE
illustrates the external data-memory stretch cycle timing relationship when PAGEE = 1 and
LSB Addr
LSB Addr
LSB Addr
Inst
Inst
Inst
MOVX Inst
Fetch
MOVX Inst
Fetch
LSB Addr
LSB Addr
LSB Addr
MOVX
MOVX
Inst
LSB Addr
MSB Addr
MSB Addr
Inst
MSB Addr
LSB Addr
LSB Addr
Memory Access (Stretch =1)
MOVX
Inst
MOVX Instruction
MOVX Instruction
33 of 47
Memory Access (Stretch =1)
LSB Addr
Inst
Memory Access (Stretch =1)
LSB Addr
LSB Addr
MOVX Instruction
Data
Data
LSB Addr
Data
LSB Addr
LSB Addr
Inst
Inst
LSB Addr
LSB Addr
LSB Addr
Inst
Inst
Inst
LSB Addr
LSB Addr
LSB Addr
Inst
Inst
Inst

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