MPC5553MZQ132 Freescale Semiconductor, MPC5553MZQ132 Datasheet - Page 47

IC MCU MPC5553 REV A 324-PBGA

MPC5553MZQ132

Manufacturer Part Number
MPC5553MZQ132
Description
IC MCU MPC5553 REV A 324-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC55xx Qorivvar
Datasheet

Specifications of MPC5553MZQ132

Core Processor
e200z6
Core Size
32-Bit
Speed
132MHz
Connectivity
CAN, EBI/EMI, Ethernet, SCI, SPI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
220
Program Memory Size
1.5MB (1.5M x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.35 V ~ 1.65 V
Data Converters
A/D 40x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
324-PBGA
Processor Series
MPC5xxx
Core
e200z6
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
7-Wire, DSPI, ESCI
Maximum Clock Frequency
132 MHz
Number Of Timers
56
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
MPC5553EVBISYS - KIT EVAL ISYSTEMS MPC5553MPC5553EVBGHS - KIT EVAL GREEN HILLS SOFTWAREMPC5553EVB - KIT EVAL MPC5553MZP132MPC5553EVBE - BOARD EVAL FOR MPC5553
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5553MZQ132
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC5553MZQ132
Quantity:
20
3.14.3
Table 30
Figure 30
3.14.4
Table 31
FEC_MDC frequency of 2.5 MHz.
Figure 31
Freescale Semiconductor
Spec
Spec
10
11
12
13
14
15
9
FEC_MDC falling-edge to FEC_MDIO output invalid
(minimum propagation delay)
FEC_MDC falling-edge to FEC_MDIO output valid
(maximum propagation delay)
FEC_MDIO (input) to FEC_MDC rising-edge setup
FEC_MDIO (input) to FEC_MDC rising-edge hold
FEC_MDC pulse-width high
FEC_MDC pulse-width low
lists MII FEC serial management channel timing. The FEC functions correctly with a maximum
lists MII FEC asynchronous input signal timing.
FEC_CRS, FEC_COL minimum pulse width
shows MII FEC asynchronous input timing listed in
shows MII FEC serial management channel timing listed in
MII FEC Asynchronous Inputs Signal Timing
FEC_CRS and FEC_COL
MII FEC Serial Management Channel Timing
FEC_MDIO and FEC_MDC
FEC_CRS, FEC_COL
Figure 30. MII FEC Asynchronous Inputs Timing Diagram
Table 30. MII FEC Asynchronous Inputs Signal Timing
Table 31. MII FEC Serial Management Channel Timing
Characteristic
Characteristic
MPC5553 Microcontroller Data Sheet, Rev. 3.0
9
Table
Min.
40%
40%
10
0
0
Min.
1.5
30.
Table
60%
60%
Max
25
31.
Max
Electrical Characteristics
FEC_MDC period
FEC_MDC period
FEC_TX_CLK period
Unit
ns
ns
ns
ns
Unit
47

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