MPC5553MZQ132 Freescale Semiconductor, MPC5553MZQ132 Datasheet - Page 26

• Manufacturer Part Number: MPC5553MZQ132
• Description: IC MCU MPC5553 REV A 324-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC55xx Qorivvar

Specifications of MPC5553MZQ132

• Core Processor: e200z6
• Core Size: 32-Bit
• Speed: 132MHz
• Connectivity: CAN, EBI/EMI, Ethernet, SCI, SPI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 220
• Program Memory Size: 1.5MB (1.5M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.35 V ~ 1.65 V
• Data Converters: A/D 40x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 324-PBGA
• Processor Series: MPC5xxx
• Core: e200z6
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: 7-Wire, DSPI, ESCI
• Maximum Clock Frequency: 132 MHz
• Number Of Timers: 56
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• For Use With: MPC5553EVBISYS - KIT EVAL ISYSTEMS MPC5553MPC5553EVBGHS - KIT EVAL GREEN HILLS SOFTWAREMPC5553EVB - KIT EVAL MPC5553MZP132MPC5553EVBE - BOARD EVAL FOR MPC5553
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Electrical Characteristics
3
4
5
3.13
3.13.1
1
26
Spec
The output delay, and the rise and fall, are calculated to 20% or 80% of the respective signal.
The output delay is shown in
system clock to the output delay.
This parameter is guaranteed by characterization rather than 100% tested.
Reset timing specified at: V
1
2
3
4
input signal
Pad
internal data
RESET pulse width
RESET glitch detect pulse width
PLLCFG, BOOTCFG, WKPCFG, RSTCFG setup time to RSTOUT valid
PLLCFG, BOOTCFG, WKPCFG, RSTCFG hold time from RSTOUT valid
AC Timing
Reset and Configuration Pin Timing
DDEH
Figure
Pad
output
Table 19. Reset and Configuration Pin Timing
= 3.0–5.25 V and T
4. To calculate the output delay with respect to the system clock, add a maximum of one
Characteristic
MPC5553 Microcontroller Data Sheet, Rev. 3.0
Rising-edge
out delay
Figure 4. Pad Output Delay
A
= T
L
to T
H
.
Falling-edge
out delay
Symbol
t
t
t
RCSU
t
RPW
GPW
RCH
1
Min.
10
10
2
0
Freescale Semiconductor
Max.
—
—
—
—
V
V
V
DD
OL
OH
÷ 2
Unit
t
t
t
t
CYC
CYC
CYC
CYC