STR912FW44X6 STMicroelectronics, STR912FW44X6 Datasheet - Page 26

• Manufacturer Part Number: STR912FW44X6
• Description: MCU 512K FLASH 96K SRAM USB CAN
• Manufacturer: STMicroelectronics
• Series: STR9r

Specifications of STR912FW44X6

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• For Use With: 497-8267 - BOARD EVAL BASED ON STR9MCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2497-5859 - EVAL BRD FULL USB DONGLE STR912MCBSTR9 - BOARD EVAL STM STR9 SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-5063-2; 497-5063-2; 497-5063-2ND; STR912FW44X6T

Functional overview
2.20
2.20.1 DMA
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SRAM, handling of transmission requests, and interrupt generation. The CPU has access to
the Message SRAM via the Message Handler using a set of 38 control registers.
The follow features are supported by the CAN interface:
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The CAN interface is not supported by DMA.
UART interfaces with DMA
The STR91xF supports three independent UART serial interfaces, designated UART0, UART1,
and UART2. Each interface is very similar to the industry-standard 16C550 UART device. All
three UART channels support IrDA encoding/decoding, requiring only an external LED
transceiver to pins UARTx_RX and UARTx_Tx for communication. One UART channel
(UART0) supports full modem control signals.
UART interfaces include the following features:
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For your reference, only two standard 16550 UART features are not supported, 1.5 stop bits
and independent receive clock.
A programmable DMA channel may be assigned by CPU firmware to service channels UART0
and UART1 for fast and direct transfers between the UART bus and SRAM with little CPU
involvement. Both DMA single-transfers and DMA burst-transfers are supported for transmit
and receive. Burst transfers require that UART FIFOs are enabled.
Bitrates up to 1 Mbps
Disable Automatic Retransmission mode for Time Triggered CAN applications
32 Message Objects
Each Message Object has its own Identifier Mask
Programmable FIFO mode
Programmable loopback mode for self-test operation
Maximum baud rate of 1.5 Mbps
Separate FIFOs for transmit and receive, each 16 deep, each FIFO can be disabled by
firmware if desired
Programmable FIFO trigger levels between 1/8 and 7/8
Programmable baud rate generator based on CCU master clock, or CCU master clock
divided by two
Programmable serial data lengths of 5, 6, 7, or 8 bits with start bit and 1 or 2 stop bits
Programmable selection of even, odd, or no-parity bit generation and detection
False start-bit detection
Line break generation and detection
Support of IrDA SIR ENDEC functions for data rates of up to 115.2K bps
IrDA bit duration selection of 3/16 or low-power (1.14 to 2.23 µsec)
Channel UART0 supports modem control functions CTS, DCD, DSR, RTS, DTR, and RI
STR91xF