STR912FW44X6 STMicroelectronics, STR912FW44X6 Datasheet - Page 16
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STR912FW44X6
Manufacturer Part Number
STR912FW44X6
Description
MCU 512K FLASH 96K SRAM USB CAN
Manufacturer
STMicroelectronics
Series
STR9r
Datasheet
1.STR910FM32X6.pdf
(73 pages)
Specifications of STR912FW44X6
Core Processor
ARM9
Core Size
32-Bit
Speed
96MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 2 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
For Use With
497-8267 - BOARD EVAL BASED ON STR9MCBSTR9UME - BOARD EVAL MCBSTR9 + ULINK-MEMCBSTR9U - BOARD EVAL MCBSTR9 + ULINK2497-5859 - EVAL BRD FULL USB DONGLE STR912MCBSTR9 - BOARD EVAL STM STR9 SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5063-2
497-5063-2
497-5063-2ND
STR912FW44X6T
497-5063-2
497-5063-2ND
STR912FW44X6T
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STR912FW44X6
Manufacturer:
ST
Quantity:
20 000
Functional overview
2.10.6 Baud rate clock (BRCLK)
2.10.7 External memory interface bus clock (BCLK)
2.10.8 USB interface clock
2.10.9 Ethernet MAC clock
2.10.10 External RTC calibration clock
2.10.11 Operation example
16/73
The baud rate clock is an internal clock derived from f
UART peripherals for baudrate generation. The frequency can be optionally divided by 2.
The BCLK is an internal clock that controls the EMI bus. All EMI bus signals are synchronized
to the BCLK. The BCLK is derived from the HCLK and the frequency can be configured to be
the same or half that of the HCLK. Refer to
frequency (f
Special consideration regarding the USB interface: The clock to the USB interface must operate
at 48 MHz and comes from one of three sources, selected under firmware control:
●
●
●
Special consideration regarding the Ethernet MAC: The external Ethernet PHY interface device
requires it’s own 25 MHz clock source. This clock can come from one of two sources:
●
●
The RTC_CLK (f
for RTC oscillator calibration. The RTC_CLK is active in Sleep mode and can be used as a
system wake up control clock.
As an example of CCU operation, a 25 MHz crystal can be connected to the main oscillator
input on pins X1_CPU and X2_CPU, a 32.768 kHz crystal connected to pins X1_RTC and
X2_RTC, and the clock input of an external Ethernet PHY device is connected to STR91xF
output pin P5.2. In this case, the CCU can run the CPU at 96 MHz from PLL, the USB interface
at 48 MHz, and the Ethernet interface at 25 MHz. The RTC is always running in the background
at 32.768 kHz, and the CPU can go to very low power mode dynamically by running from
32.768 kHz and shutting off peripheral clocks and the PLL as needed.
CCU master clock output of 48 MHz.
CCU master clock output of 96 MHz. An optional divided-by-two circuit is available to
produce 48 MHz for the USB while the CPU system runs at 96MHz.
STR91xF pin P2.7. An external 48 MHz oscillator connected to pin P2.7 can directly
source the USB while the CCU master clock can run at some frequency other than 48 or
96 MHz.
A 25 MHz clock signal coming from a dedicated output pin (P5.2) of the STR91xF. In this
case, the STR91xF must use a 25 MHz signal on its main oscillator input in order to pass
this 25 MHz clock back out to the PHY device through pin P5.2. The advantage here is that
an inexpensive 25 MHz crystal may be used to source a clock to both the STR91xF and
the external PHY device.
An external 25 MHz oscillator connected directly to the external PHY interface device. In
this case, the STR91xF can operate independent of 25 MHz.
BCLK
).
RTC/8
) can be enabled as an output on the JRTCK pin. The RTC_CLK is used
Table 9 on page 50
MSTR
that is used by the three on-chip
for the maximum BCLK
STR91xF