ST92F150JDV1QC STMicroelectronics, ST92F150JDV1QC Datasheet - Page 351

IC MCU 128K FLASH 100-PQFP

ST92F150JDV1QC

Manufacturer Part Number
ST92F150JDV1QC
Description
IC MCU 128K FLASH 100-PQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet

Specifications of ST92F150JDV1QC

Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
77
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-QFP
Processor Series
ST92F15x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
6 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
5 x 16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Case
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2137

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0
CONTROLLER AREA NETWORK (Cont’d)
MAILBOX FILTER MATCH INDEX (MFMI)
This register is read only.
Reset Value: 0000 0000 (00h)
Bit 7:0 = FMI[7:0] Filter Match Index
This register contains the index of the filter the
message stored in the mailbox passed through.
For more details on identifier filtering please refer
to
graph.
Note: This register is implemented only in receive
mailboxes. In transmit mailboxes, the MCSR reg-
ister is mapped at this location.
MAILBOX IDENTIFIER REGISTERS
(MIDR[3:0])
Read / Write
Reset Value: xxxx xxxx (xxh)
MIDR0
Bit 7 = Reserved. Forced to 0 by hardware.
Bit 6 = IDE Extended Identifier
This bit defines the identifier type of message in
the mailbox.
0: Standard identifier.
1: Extended identifier.
Bit 5 = RTR Remote Transmission Request
0: Data frame
1: Remote frame
Bit 4:0 = STID[10:6] Standard Identifier
5 most significant bits of the standard part of the
identifier.
FMI7
7
7
0
Section 10.10.5.4
FMI6
IDE
FMI5
RTR
STID10
FMI4
- Filter Match Index para-
STID9
FMI3
STID8
FMI2
STID7
FMI1
STID6
FMI0
0
0
CONTROLLER AREA NETWORK (bxCAN)
MIDR1
Bit 7:2 = STID[5:0] Standard Identifier
6 least significant bits of the standard part of the
identifier.
Bit 1:0 = EXID[17:16] Extended Identifier
2 most significant bits of the extended part of the
identifier.
MIDR2
Bit 7:0 = EXID[15:8] Extended Identifier
Bit 15 to 8 of the extended part of the identifier.
MIDR3
Bit 7:1 = EXID[6:0] Extended Identifier
6 least significant bits of the extended part of the
identifier.
EXID15 EXID14 EXID13 EXID12 EXID11 EXID10
STID5
EXID7
7
7
7
STID4
EXID6
STID3
EXID5
EXID4
STID2
EXID3
STID1
EXID2
STID0
EXID17 EXID16
EXID9
EXID1
351/429
EXID8
EXID0
0
0
0
9

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