ST92F150JDV1QC STMicroelectronics, ST92F150JDV1QC Datasheet - Page 269
![IC MCU 128K FLASH 100-PQFP](/photos/6/81/68170/497-100-pqfp_series_sml.jpg)
ST92F150JDV1QC
Manufacturer Part Number
ST92F150JDV1QC
Description
IC MCU 128K FLASH 100-PQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet
1.ST92F150CV1TB.pdf
(429 pages)
Specifications of ST92F150JDV1QC
Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
77
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-QFP
Processor Series
ST92F15x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
6 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
5 x 16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Case
QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2137
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Figure 129. Event Flags and Interrupt Generation
BTF=1 & TRA=0
BTF=1 & TRA=1
EV5: EVF=1, SB=1, cleared by reading SR1 register followed by writing DR register.
EV6: EVF=1, ADDTX=1, cleared by reading SR1 register followed by writing CR register
EV7: EVF=1, BTF=1, cleared by reading SR1 register followed by reading DR register or when DMA
EV8: EVF=1, BTF=1, cleared by reading SR1 register followed by writing DR register or when DMA
EV9: EVF=1, ADD10=1, cleared by reading SR1 register followed by writing DR register.
ADDTX
STOPF
ADD10
BERR
ARLO
(for example PE=1).
is complete.
is complete.
ADSL
SB
AF
ITE
ITE
ITE
Transmitting DMA
Receiving DMA
End Of Block
End Of Block
I2CSR1.EVF
ITXP
TEOBP
IRXP
REOBP
IERRP
IERRM
ITXM
IRXM
I2C BUS INTERFACE
READY TO TRANSMIT
END OF BLOCK
INTERRUPT
DATA RECEIVED
REQUEST
INTERRUPT
END OF BLOCK
ERROR
REQUEST
INTERRUPT
REQUEST
or
or
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