SX18AC/SO Parallax Inc, SX18AC/SO Datasheet - Page 3

• Manufacturer Part Number: SX18AC/SO
• Description: IC MCU 2K FLASH 50MHZ SO-18
• Manufacturer: Parallax Inc
• Series: SXr

Specifications of SX18AC/SO

• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 50MHz
• Number Of I /o: 12
• Program Memory Size: 3KB (2K x 12)
• Program Memory Type: FLASH
• Ram Size: 137 x 8
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-SOIC
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -

1.2 Key Features
• Analog comparator
• Brown-out detector (4.2V, on/off)
• Multi-Input Wakeup (MIWU) on eight pins
• Fast lookup capability through run-time readable code
• Complete development tool support available through
1.2.1 CPU Features
• Fully static design – DC to 50 MHz operation
• 20 ns instruction cycle time
• Mostly single-cycle instructions
• Selectable 8-level deep hardware subroutine stack
• Single-level interrupt stack
• Fixed interrupt response time: 60 ns internal, 100 ns
• Hardware context save/restore for interrupt
• Designed to be pin-compatible and upward code-com-
1.2.2 I/O Features
• Software-selectable I/O configuration
• Schmitt trigger inputs on Port B and Port C
• All outputs capable of sinking/sourcing 30 mA
• Symmetrical drive on Port A outputs (same V
1.3 Architecture
The SX devices use a modified Harvard architecture.
This architecture uses two separate memories with sepa-
rate address buses, one for the program and one for
data, while allowing transfer of data from program mem-
ory to SRAM. This ability allows accessing data tables
from program memory. The advantage of this architec-
ture is that instruction fetch and memory transfers can be
overlapped with a multi-stage pipeline, which means the
next instruction can be fetched from program memory
while the current instruction is being executed using data
from the data memory.
The SX family implements a four-stage pipeline (fetch,
decode, execute, and write back), which results in execu-
tion of one instruction per clock cycle. At the maximum
operating frequency of 50 MHz, instructions are executed
at the rate of one per 20-ns clock cycle.
© 1998 Scenix Semiconductor, Inc. All rights reserved.
Parallax
external at 50 MHz
pitable with the PIC165x
– Each pin programmable as an input or output
– TTL or CMOS level selection on inputs
– Internal weak pull-up selection on inputs (~20 k to
V
dd
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(Continued)
®
drop
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1.4 Programming and Debugging Support
The SX devices are currently supported by the SX-Key™
offered by Parallax, Inc. This tool provides an integrated
development environment including editor, macro assem-
bler, debugger, and programmer.
1.5 Applications
Emerging applications and advances in existing ones
require higher performance while maintaining low cost
and fast time-to-market.
The SX devices provide solutions for many familiar appli-
cations such as process controllers, electronic appli-
ances/tools, security/monitoring systems, and personal
communication devices. In addition, the enhanced
throughput allows efficient development of software mod-
ules called Virtual Peripherals to replace on-chip hard-
ware peripherals. The concept of Virtual Peripherals
provides benefits such as using a more simple device,
reduced component count, fast time to market, increased
flexibility in design, and ultimately overall system cost
reduction.
Some examples of Virtual Peripheral modules are:
• Serial, Parallel, I
• Frequency generation and measurement
• Spectrum analysis
• Multi-tasking, interrupts, and networking
• Resonance loops
• DRAM drivers
• Music and voice synthesis
• PPM/PWM output
• Delta/Sigma ADC
• DTMF I/O and call progress
• 300/1200 baud modem
• Quadrature encoder/decoder
• Peripheral Interface Device (PID) and servo control
• Video controller
Wire, SPI, DMX-512, X-10, IR transceivers
2
C™, Microwire™ (µ-Wire), Dallas µ-
SX18AC / SX20AC / SX28AC
www.scenix.com