AT91FR40162S-CJ Atmel, AT91FR40162S-CJ Datasheet - Page 7

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AT91FR40162S-CJ

Manufacturer Part Number
AT91FR40162S-CJ
Description
IC ARM MCU FLASH 1K 121BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91FR40162S-CJ

Core Processor
ARM7
Core Size
16/32-Bit
Speed
75MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
WDT
Number Of I /o
32
Program Memory Size
2MB (1M x 16)
Program Memory Type
FLASH
Ram Size
256K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
121-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

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5.2.1
5.2.2
6174B–ATARM–07-Nov-05
System Peripherals
User Peripherals
The External Bus Interface (EBI) controls the external memory or peripheral devices via an 8- or
16-bit databus and is programmed through the APB. Each chip select line has its own program-
ming register.
The Power-saving (PS) module implements the Idle Mode (ARM7TDMI core clock stopped until
the next interrupt) and enables the user to adapt the power consumption of the microcontroller to
application requirements (independent peripheral clock control).
The Advanced Interrupt Controller (AIC) controls the internal interrupt sources from the internal
peripherals and the four external interrupt lines (including the FIQ) to provide an interrupt and/or
fast interrupt request to the ARM7TDMI. It integrates an 8-level priority controller, and, using the
Auto-vectoring feature, reduces the interrupt latency time.
The Parallel Input/Output Controller (PIO) controls up to 32 I/O lines. It enables the user to
select specific pins for on-chip peripheral input/output functions, and general-purpose input/out-
put signal pins. The PIO controller can be programmed to detect an interrupt on a signal change
from each line.
The Watchdog (WD) can be used to prevent system lock-up if the software becomes trapped in
a deadlock.
The Special Function (SF) module integrates the Chip ID, the Reset Status and the Protect
registers.
Two USARTs, independently configurable, enable communication at a high baud rate in syn-
chronous or asynchronous mode. The format includes start, stop and parity bits and up to 8 data
bits. Each USART also features a Timeout and a Time Guard register, facilitating the use of the
two dedicated Peripheral Data Controller (PDC) channels.
The 3-channel, 16-bit Timer Counter (TC) is highly programmable and supports capture or
waveform modes. Each TC channel can be programmed to measure or generate different kinds
of waves, and can detect and control two input/output signals. The TC has also 3 external clock
signals.
AT91FR40162S Preliminary
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