AT91FR40162S-CJ Atmel, AT91FR40162S-CJ Datasheet - Page 61

• Manufacturer Part Number: AT91FR40162S-CJ
• Description: IC ARM MCU FLASH 1K 121BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91FR40162S-CJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 75MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: WDT
• Number Of I /o: 32
• Program Memory Size: 2MB (1M x 16)
• Program Memory Type: FLASH
• Ram Size: 256K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 121-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

11.5
Table 11-2.
Notes:
6174B–ATARM–07-Nov-05
Command
Sequence
Read
Chip Erase
Sector Erase
Byte/Word Program
Dual Byte/Word
Program
Enter Single Pulse
Program Mode
Single Pulse
Byte/Word Program
Sector Lockdown
Erase/Program
Suspend
Erase/Program
Resume
Product ID Entry
Product ID Exit
Product ID Exit
Program Protection
Register
Lock Protection
Register - Block B
Status of Block B
Protection
Set Configuration
Register
CFI Query
Flash Memory Command Definitiion
1. The DATA FORMAT shown for each bus cycle is as follows; I/O7 - I/O0 (Hex). In word operation I/O15 - I/O8
2. Since A11 is a Don’t Care, AAA can be replaced with 2AA.
3. SA = sector address. Any byte/word address within a sector can be used to designate the sector address (see
4. Once a sector is in the lockdown mode, data in the protected sector cannot be changed unless the chip is reset or power
5. Either one of the Product ID Exit commands can be used.
6. If data bit D1 is “0”, block B is locked. If data bit D1 is “1”, block B can be reprogrammed.
7. The default state (after power-up) of the configuration register is “00”.
8. Bytes of data other than F0 may be used to exit the Product ID mode. However, it is recommended that F0 be used.
9. This fast programming option enables the user to program two words in parallel only when V
(9)
are don’t care. The ADDRESS FORMAT shown for each bus cycle is as follows: A11 - A0 (Hex). Address A19 through A11
are don’t care in the word mode. Address A19 through A11 and A-1 are don’t care in the byte mode.
”Sector Address”, on page 63
cycled.
and Addr2, of the two words, D
turing purposes only.
(5)
(5)
Command Definition Table
Cycles
Bus
1
6
6
4
5
6
1
6
1
1
3
3
1
4
4
4
4
1
Addr
Addr
Addr
XXX
XXX
XXX
X55
555
555
555
555
555
555
555
555
555
555
555
555
1st Bus
Cycle
D
Data
F0
AA
AA
AA
AA
AA
D
AA
AA
AA
AA
AA
AA
AA
B0
30
98
OUT
for details).
IN
(8)
IN1
and D
AAA
AAA
Addr
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
AAA
2nd Bus
IN2
(2)
(2)
Cycle
, must only differ in address A0. This command should be used during manufac-
Data
55
55
55
55
55
55
55
55
55
55
55
55
Addr
555
555
555
555
555
555
555
555
555
555
555
555
3rd Bus
Cycle
Data
F0
A0
E0
C0
C0
D0
80
80
80
80
90
90
(8)
AT91FR40162S Preliminary
Addr1
Addr
Addr
Addr
XXX
555
555
555
555
080
80
4th Bus
Cycle
00/01
D
Data
D
OUT
D
D
AA
AA
AA
AA
X0
IN1
IN
IN
(6)
(7)
Addr2
Addr
AAA
AAA
AAA
AAA
PP
5th Bus
= 12V. The Addresses, Addr1
Cycle
Data
D
55
55
55
55
IN2
SA
SA
Addr
555
555
(3)(4)
(3)(4)
Section 11.7
6th Bus
Cycle
Data
A0
10
30
60
61