PIC18C452-E/PT Microchip Technology, PIC18C452-E/PT Datasheet - Page 202
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18C452-E/PT
Manufacturer Part Number
PIC18C452-E/PT
Description
IC MCU OTP 16KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C242-ISO.pdf
(305 pages)
4.PIC18C242-ISO.pdf
(12 pages)
Specifications of PIC18C452-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C452E/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C452-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C242-ISO PDF datasheet #3
- PIC18C242-ISO PDF datasheet #4
- Current page: 202 of 305
- Download datasheet (6Mb)
PIC18CXX2
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39026C-page 200
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
If FLAG<1> =
If FLAG<1> =
No
No
No
Q1
Q1
Q1
PC
PC
Bit Test File, Skip if Clear
[ label ] BTFSC f,b[,a]
0
0
a
skip if (f<b>) = 0
None
If bit 'b' in register ’f' is 0, then the
next instruction is skipped.
If bit 'b' is 0, then the next instruction
fetched during the current instruction
execution is discarded, and a NOP is
executed instead, making this a two-
cycle instruction. If ‘a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value (default).
1
1(2)
Note: 3 cycles if skip and followed
register ’f’
HERE
FALSE
TRUE
operation
operation
operation
Read
1011
No
No
No
Q2
Q2
Q2
=
=
=
f
b
[0,1]
255
by a 2-word instruction.
7
address (HERE)
0;
address (TRUE)
1;
address (FALSE)
BTFSC
:
:
Process Data
bbba
operation
operation
operation
No
No
No
Q3
Q3
Q3
FLAG, 1, 0
ffff
operation
operation
operation
operation
No
No
No
No
Q4
Q4
Q4
ffff
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If skip:
If skip and followed by 2-word instruction:
Before Instruction
After Instruction
operation
operation
operation
Decode
PC
If FLAG<1> =
If FLAG<1> =
No
No
No
Q1
Q1
Q1
PC
PC
Bit Test File, Skip if Set
[ label ] BTFSS f,b[,a]
0
0
a
skip if (f<b>) = 1
None
If bit 'b' in register 'f' is 1 then the next
instruction is skipped.
If bit 'b' is 1, then the next instruction
fetched during the current instruc-
tion execution, is discarded and a
NOP is executed instead, making this
a two-cycle instruction. If ‘a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value (default).
1
1(2)
Note:
HERE
FALSE
TRUE
register ’f’
operation
operation
operation
Read
1010
No
No
No
Q2
Q2
Q2
=
=
=
f
b < 7
[0,1]
2001 Microchip Technology Inc.
255
address (HERE)
0;
address (FALSE)
1;
address (TRUE)
3 cycles if skip and followed
by a 2-word instruction.
BTFSS
:
:
Process Data
bbba
operation
operation
operation
No
No
No
Q3
Q3
Q3
FLAG, 1, 0
ffff
operation
operation
operation
operation
No
No
No
No
Q4
Q4
Q4
ffff
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