PIC18C452-E/PT Microchip Technology, PIC18C452-E/PT Datasheet - Page 104
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PIC18C452-E/PT
Manufacturer Part Number
PIC18C452-E/PT
Description
IC MCU OTP 16KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C242-ISO.pdf
(305 pages)
4.PIC18C242-ISO.pdf
(12 pages)
Specifications of PIC18C452-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C452E/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C452-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C242-ISO PDF datasheet #3
- PIC18C242-ISO PDF datasheet #4
- Current page: 104 of 305
- Download datasheet (6Mb)
PIC18CXX2
11.2
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon RESET.
FIGURE 11-1:
TABLE 11-1:
DS39206C-page 102
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the Timer2 module.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18C2X2 devices. Always maintain these bits clear.
Name
Timer2 Interrupt
Note 1:
Timer2 Module Register
Timer2 Period Register
PSPIF
PSPIE
PSPIP
F
OSC
Bit 7
—
/4
(1)
(1)
(1)
TMR2 register output can be software selected by the SSP Module as a baud clock.
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
TIMER2 BLOCK DIAGRAM
ADIF
ADIE
ADIP
Bit 6
T2CKPS1:T2CKPS0
1:1, 1:4, 1:16
Prescaler
TMR0IE
RCIF
RCIE
RCIP
Bit 5
2
INT0IE
TXIE
TXIP
Bit 4
TXIF
Comparator
TMR2
PR2
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
RESET
EQ
11.3
The output of TMR2 (before the postscaler) is fed to the
Synchronous Serial Port module, which optionally uses
it to generate the shift clock.
TMR0IF
CCP1IF
CCP1IE
CCP1IP
Bit 2
TOUTPS3:TOUTPS0
1:1
Postscaler
Output of TMR2
to
Output
TMR2IE
TMR2IP
TMR2IF
INT0IF
TMR2
4
1:16
Bit 1
(1)
TMR1IE
TMR1IP
TMR1IF
Bit 0
RBIF
2001 Microchip Technology Inc.
bit TMR2IF
0000 000x 0000 000u
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
POR, BOR
Sets Flag
Value on
Value on
RESETS
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