PIC18C452-E/PT Microchip Technology, PIC18C452-E/PT Datasheet - Page 111
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PIC18C452-E/PT
Manufacturer Part Number
PIC18C452-E/PT
Description
IC MCU OTP 16KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C242-ISO.pdf
(305 pages)
4.PIC18C242-ISO.pdf
(12 pages)
Specifications of PIC18C452-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC18C452E/PT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C452-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C242-ISO PDF datasheet #3
- PIC18C242-ISO PDF datasheet #4
- Current page: 111 of 305
- Download datasheet (6Mb)
13.3
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 or TMR3 registers when an
event occurs on pin RC2/CCP1. An event is defined as:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the inter-
rupt request flag bit CCP1IF (PIR1<2>) is set. It must
be cleared in software. If another capture occurs before
the value in register CCPR1 is read, the old captured
value will be lost.
13.3.1
In Capture mode, the RC2/CCP1 pin should be config-
ured as an input by setting the TRISC<2> bit.
13.3.2
The timers that are to be used with the capture feature
(either Timer1 and/or Timer3) must be running in Timer
mode or Synchronized Counter mode. In Asynchro-
nous Counter mode, the capture operation may not
work. The timer to be used with each CCP module is
selected in the T3CON register.
FIGURE 13-1:
Note:
2001 Microchip Technology Inc.
Capture Mode
If the RC2/CCP1 is configured as an out-
put, a write to the port can cause a capture
condition.
CCP PIN CONFIGURATION
TIMER1/TIMER3 MODE SELECTION
CCP1 pin
CCP2 pin
CAPTURE MODE OPERATION BLOCK DIAGRAM
Edge Detect
Edge Detect
Q’s
Q’s
Prescaler
Prescaler
1, 4, 16
1, 4, 16
and
and
CCP1CON<3:0>
CCP2CON<3:0>
Set Flag bit CCP1IF
Set Flag bit CCP2IF
T3CCP1
T3CCP2
T3CCP2
T3CCP1
T3CCP2
T3CCP2
13.3.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit, CCP1IF, following any such
change in operating mode.
13.3.4
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off, or the CCP module is not in Capture mode,
the prescaler counter is cleared. This means that any
RESET will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore, the first capture may be from
a non-zero prescaler. Example 13-1 shows the recom-
mended method for switching between capture pres-
calers. This example also clears the prescaler counter
and will not generate the “false” interrupt.
EXAMPLE 13-1:
CLRF
MOVLW
MOVWF
NEW_CAPT_PS ; Load WREG with the
CCP1CON
CCP1CON, F ; Turn CCP module off
SOFTWARE INTERRUPT
CCP PRESCALER
TMR1
Enable
TMR1
Enable
TMR3
Enable
TMR3
Enable
TMR3H
CCPR1H
TMR1H
TMR3H
CCPR2H
TMR1H
CHANGING BETWEEN
CAPTURE PRESCALERS
; new prescaler mode
; value and CCP ON
; Load CCP1CON with
; this value
PIC18CXX2
TMR3L
CCPR1L
TMR1L
TMR3L
CCPR2L
TMR1L
DS39026C-page 109
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