ATMEGA161-8PI Atmel, ATMEGA161-8PI Datasheet - Page 66

• Manufacturer Part Number: ATMEGA161-8PI
• Description: IC AVR MCU 16K 8MHZ IND 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA161-8PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: ATMEGA1618PI

SPI Control Register – SPCR
66
ATmega161(L)
Figure 43. SPI Transfer Format with CPHA = 1 and DORD = 0
• Bit 7
This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR Register is set
and if the global interrupt enable bit in SREG is set.
• Bit 6
When the SPE bit is set (one), the SPI is enabled. This bit must be set to enable any SPI
operations.
• Bit 5
When the DORD bit is set (one), the LSB of the data word is transmitted first.
When the DORD bit is cleared (zero), the MSB of the data word is transmitted first.
• Bit 4
This bit selects Master SPI mode when set (one), and Slave SPI mode when cleared
(zero). If SS is configured as an input and is driven low while MSTR is set, MSTR will be
cleared and SPIF in SPSR will become set. The user will then have to set MSTR to re-
enable SPI Master mode.
• Bit 3
When this bit is set (one), SCK is high when idle. When CPOL is cleared (zero), SCK is
low when idle. Refer to Figure 42 and Figure 43 for additional information.
• Bit 2
Refer to Figure 42 or Figure 43 for the functionality of this bit.
Bit
$0D ($2D)
Read/Write
Initial Value
–
–
–
–
–
–
SPIE: SPI Interrupt Enable
SPE: SPI Enable
DORD: Data Order
MSTR: Master/Slave Select
CPOL: Clock Polarity
CPHA: Clock Phase
SPIE
R/W
7
0
SPE
R/W
6
0
DORD
R/W
5
0
MSTR
R/W
4
0
CPOL
R/W
3
0
CPHA
R/W
2
0
SPR1
R/W
1
0
SPR0
R/W
1228D–AVR–02/07
0
0
SPCR