ATMEGA161-8PI Atmel, ATMEGA161-8PI Datasheet - Page 42

• Manufacturer Part Number: ATMEGA161-8PI
• Description: IC AVR MCU 16K 8MHZ IND 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA161-8PI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: ATMEGA1618PI

Timer/Counter0 Control
Register – TCCR0
Timer/Counter2 Control
Register – TCCR2
42
ATmega161(L)
• Bit 7
Writing a logical “1” to this bit forces a change in the compare match output pin PB0
(Timer/Counter0) and PB1 (Timer/Counter2) according to the values already set in
COMn1 and COMn0. If the COMn1 and COMn0 bits are written in the same cycle as
FOC0/FOC2, the new settings will not take effect until the next compare match or
Forced Output Compare Match occurs. The Force Output Compare bit can be used to
change the output pin without waiting for a compare match in the timer. The automatic
action programmed in COMn1 and COMn0 happens as if a Compare Match had
occurred, but no interrupt is generated and the Timer/Counters will not be cleared even
if CTC0/CTC2 is set. The FOC0/FOC2 bits will always be read as zero. The setting of
the FOC0/FOC2 bits has no effect in PWM mode.
• Bit 6
When set (one), this bit enables PWM mode for Timer/Counter0 or Timer/Counter2.
This mode is described on page 44.
• Bits 5, 4
The COMn1 and COMn0 control bits determine any output pin action following a com-
pare match in Timer/Counter0 or Timer/Counter2. Output pin actions affect pins
PB0(OC0) or PB1(OC2). This is an alternative function to an I/O port and the corre-
sponding direction control bit must be set (one) to control an output pin. The control
configuration is shown in Table 9.
Table 9. Compare Mode Select
Notes:
• Bit 3
When the CTC0 or CTC2 control bit is set (one), Timer/Counter0 or Timer/Counter2 is
reset to $00 in the CPU clock cycle after a compare match. If the control bit is cleared,
the Timer/Counter continues counting and is unaffected by a compare match. When a
Bit
$33 ($53)
Read/Write
Initial Value
Bit
$27 ($47)
Read/Write
Initial Value
COMn1
0
0
1
1
–
–
–
1. In PWM mode, these bits have a different function. Refer to Table 12 for a detailed
2. n = 0 or 2
FOC0/FOC2: Force Output Compare
PWM0/PWM2: Pulse Width Modulator Enable
CTC0/CTC2: Clear Timer/Counter on Compare Match
description.
–
COM01, COM00/COM21, COM20: Compare Output Mode, Bits 1 and 0
FOC0
FOC2
R/W
R/W
7
0
7
0
COMn0
0
1
0
1
PWM0
PWM2
R/W
R/W
6
0
6
0
Description
Timer/Counter disconnected from output pin OCn.
Toggle the OCn output line.
Clear the OCn output line (to zero).
Set the OCn output line (to one).
COM01
COM21
R/W
R/W
(1)(2)
5
0
5
0
COM00
COM20
R/W
R/W
4
0
4
0
CTC0
CTC2
R/W
R/W
3
0
3
0
CS22
CS02
R/W
R/W
2
0
2
0
CS21
R/W
CS01
R/W
1
0
1
0
CS20
CS00
R/W
R/W
1228D–AVR–02/07
0
0
0
0
TCCR0
TCCR2