AT90S2313-4SI Atmel, AT90S2313-4SI Datasheet - Page 57

MCU 2K FLASH 4MHZ 20-SOIC

AT90S2313-4SI

Manufacturer Part Number
AT90S2313-4SI
Description
MCU 2K FLASH 4MHZ 20-SOIC
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheet

Specifications of AT90S2313-4SI

Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI, UART
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
15
Number Of Timers
1 x 8 bit
Operating Supply Voltage
2.7 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90S2313-4SI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Port D Schematics
0839I–AVR–06/02
• INT1 – Port D, Bit 3
INT1, External Interrupt Source 1. The PD3 pin can serve as an external interrupt
source to the MCU. See the interrupt description for further details and how to enable
the source.
• INT0 – Port D, Bit 2
INT0, External Interrupt Source 0. The PD2 pin can serve as an external interrupt
source to the MCU. See the interrupt description for further details and how to enable
the source.
• TXD – Port D, Bit 1
Transmit Data (Data Output pin for the UART). When the UART Transmitter is enabled,
this pin is configured as an output regardless of the value of DDRD1.
• RXD – Port D, Bit 0
Receive Data (Data Input pin for the UART). When the UART Receiver is enabled, this
pin is configured as an input regardless of the value of DDRD0. When the UART forces
this pin to be an input, a logical “1” in PORTD0 will turn on the internal pull-up.
Note that all port pins are synchronized. The synchronization latches are, however, not
shown in the figures.
Figure 44. Port D Schematic Diagram (Pin PD0)
PD0
WP:
WD:
RL:
RP:
RD:
RXD:
RXEN:
MOS
PULL-
UP
WRITE PORTD
WRITE DDRD
READ PORTD LATCH
READ PORTD PIN
READ DDRD
UART RECEIVE DATA
UART RECEIVE ENABLE
RL
RP
Q
Q
PORTD0
RESET
RESET
DDD0
WD
WP
RD
C
C
AT90S2313
D
D
RXEN
RXD
57

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