SAF-C515C-8EM CA Infineon Technologies, SAF-C515C-8EM CA Datasheet - Page 49

• Manufacturer Part Number: SAF-C515C-8EM CA
• Description: IC MCU 8BIT OTP MQFP-80-1
• Manufacturer: Infineon Technologies
• Series: C5xx/C8xxr

Specifications of SAF-C515C-8EM CA

• Core Processor: C500
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: OTP
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 4.25 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-SQFP
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: USART, SSC
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Packages: PG-MQFP-80
• Max Clock Frequency: 10.0 MHz
• Sram (incl. Cache): 2.25 KByte
• Can Nodes: 1
• A / D Input Lines (incl. Fadc): 8
• Program Memory: 64.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: F515C8EMCANP; F515C8EMCAXT; SAF-C515C-8EMCA; SAF-C515C-8EMCA; SAF-C515C-8EMCAIN; SAFC515C8EMCAX; SP000068749; SP000106399

10-Bit A/D Converter
The C515C includes a high performance / high speed 10-bit A/D-Converter (ADC) with
8 analog input channels. It operates with a successive approximation technique and
uses self calibration mechanisms for reduction and compensation of offset and linearity
errors. The A/D converter provides the following features:
• 8 multiplexed input channels (port 6), which can also be used as digital inputs
• 10-bit resolution
• Single or continuous conversion mode
• Internal or external start-of-conversion trigger capability
• Interrupt request generation after each conversion
• Using successive approximation conversion technique via a capacitor array
• Built-in hidden calibration of offset and linearity errors
The main functional blocks of the A/D converter are shown in
The A/D converter uses basically two clock signals for operation: the input clock
(= 1/
the C515C system clock
equal to
therefore must be adapted to
table in
which must be selected for typical system clock rates.
Data Sheet
t
IN
) and the conversion clock
Figure 18
f
OSC
. The conversion clock is limited to a maximum frequency of 2 MHz and
shows the prescaler ratios and the resulting A/D conversion times
f
OSC
f
OSC
which is applied at the XTAL pins. The input clock
f
ADC
by programming the conversion clock prescaler. The
(= 1/
45
t
ADC
). These clock signals are derived from
Figure
19.
C515C
2003-02
f
IN
f
IN
is