UPD70F3745GJ-GAE-AX Renesas Electronics America, UPD70F3745GJ-GAE-AX Datasheet - Page 873

• Manufacturer Part Number: UPD70F3745GJ-GAE-AX
• Description: MCU 32BIT V850ES/JX3 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Jx3r

Specifications of UPD70F3745GJ-GAE-AX

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 128
• Program Memory Size: 768KB (768K x 8)
• Program Memory Type: FLASH
• Ram Size: 60K x 8
• Voltage - Supply (vcc/vdd): 2.85 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

V850ES/JJ3
R01UH0016EJ0400 Rev.4.00
Sep 30, 2010
Functions
Function
P6 register
PM6 register
PMC6 register
PF6 register
P7H register,
P7L register
PM7H register,
PM7L register
Port 8
PMC8 register
PF8 register
Port 9
P9 register
PM9 register
PMC9 register
PFC9 register
PFCE9 register
Specification of
port 9 alternate
function
PF9 register
PDL register
Details of
Function
To read/write bits 8 to 15 of the P6 register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the P6H register.
To read/write bits 8 to 15 of the PM6 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PM6H register.
To read/write bits 8 to 15 of the PMC6 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PMC6H register.
When an output pin is pulled up at EV
1.
To read/write bits 8 to 15 of the PF6 register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the PF6H register.
Do not read or write the P7H and P7L registers during A/D conversion (see 13.6
(4) Alternate I/O).
When using the P7n pin as its alternate function (ANIn pin), set the PM7n bit to 1. p. 97
The P80 pin has hysteresis characteristics in the input mode of the alternate-
function pin, but does not have the hysteresis characteristics in the port mode.
The INTP8 and RXDA3 pins are alternate-function pins. When using the RXDA3
pin, disable detection of the edge of the INTP8 pin (INTF8.INTF80 bit = 0 and
INTR8.INTR80 bit = 0). When using the INTP8 pin, stop the reception operation
of UARTA3 (UA3CTL0.UA3RXE bit = 0).
When an output pin is pulled up at EV
The P90 to P97, P99, P910, and P912 to P915 pins have hysteresis
characteristics in the input mode of the alternate-function pin, but do not have the
hysteresis characteristics in the port mode.
To read/write bits 8 to 15 of the P9 register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the P9H register.
To read/write bits 8 to 15 of the PM9 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PM9H register.
To read/write bits 8 to 15 of the PMC9 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PMC9H register.
When using the A0 to A15 pins as the alternate functions of the P90 to P915 pins,
be sure to set all 16 bits of the PMC9 register to FFFFH at once.
When performing separate address bus output (A0 to A15), set the PMC9 register
to FFFFH for all 16 bits at once after clearing the PFC9 or PFCE9 register to
0000H.
To read/write bits 8 to 15 of the PFC9 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PFC9H register.
When performing separate address bus output (A0 to A15), set the PMC9 register
to FFFFH for all 16 bits at once after clearing the PFC9 or PFCE9 register to
0000H.
To read/write bits 8 to 15 of the PFCE9 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PFCE9H register.
The RXDA1 and KR7 pins must not be used at the same time. When using the
RXDA1 pin, do not use the KR7 pin. When using the KR7 pin, do not use the RXDA1
pin (it is recommended to set the PFC91 bit to 1 and clear the PFCE91 bit to 0).
When an output pin is pulled up at EV
To read/write bits 8 to 15 of the PF9 register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the PF9H register.
To read/write bits 8 to 15 of the PDL register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the PDLH register.
Cautions
DD
DD
DD
or higher, be sure to set the PF8n bit to 1.
or higher, be sure to set the PF6n bit to
or higher, be sure to set the PF9n bit to 1. p. 107
APPENDIX E LIST OF CAUTIONS
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