SAF-C165-L25F HA Infineon Technologies, SAF-C165-L25F HA Datasheet - Page 25
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SAF-C165-L25F HA
Manufacturer Part Number
SAF-C165-L25F HA
Description
IC MCU 16BIT ROM/LESS TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C165-LF_HA.pdf
(77 pages)
Specifications of SAF-C165-L25F HA
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
77
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
ASC, SSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
77
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Packages
PG-TQFP-100
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
2.0 KByte
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
F165L25FHAXT
SAF-C165-L25FHA
SAF-C165-L25FHAINTR
SAF-C165-L25FHATR
SAF-C165-L25FHATR
SAFC165L25FHAXT
SP000012870
SAF-C165-L25FHA
SAF-C165-L25FHAINTR
SAF-C165-L25FHATR
SAF-C165-L25FHATR
SAFC165L25FHAXT
SP000012870
Figure 6
With its maximum resolution of 8 TCL, the GPT2 module provides precise event control
and time measurement. It includes two timers (T5, T6) and a capture/reload register
(CAPREL). Both timers can be clocked with an input clock which is derived from the CPU
clock. The count direction (up/down) for each timer is programmable by software.
Concatenation of the timers is supported via the output toggle latch (T6OTL) of timer T6,
which changes its state on each timer overflow/underflow.
The state of this latch may be used to clock timer T5 and/or it may be output on pin
T6OUT. The overflows/underflows of timer T6 can cause a reload from the CAPREL
register. The CAPREL register may capture the contents of timer T5 based on an
external signal transition on the corresponding port pin (CAPIN), and timer T5 may
optionally be cleared after the capture procedure. This allows the C165 to measure
absolute time differences or to perform pulse multiplication without software overhead.
Data Sheet
n = 3 … 10
T2EUD
T3EUD
T4EUD
T2IN
T3IN
T4IN
f
f
f
CPU
CPU
CPU
Block Diagram of GPT1
2
2
2
n
n
n
: 1
: 1
: 1
Control
Control
Control
Mode
Mode
Mode
T2
T3
T4
Capture
Capture
Reload
Reload
U/D
GPT1 Timer T2
GPT1 Timer T3
GPT1 Timer T4
21
U/D
U/D
Toggle FF
T3OTL
Interrupt
Request
Interrupt
Request
Other
Timers
Interrupt
Request
V2.0, 2000-12
T3OUT
MCT02141
C165