SAF-C165-L25F HA Infineon Technologies, SAF-C165-L25F HA Datasheet - Page 14
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SAF-C165-L25F HA
Manufacturer Part Number
SAF-C165-L25F HA
Description
IC MCU 16BIT ROM/LESS TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C165-LF_HA.pdf
(77 pages)
Specifications of SAF-C165-L25F HA
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
77
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
ASC, SSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
77
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Packages
PG-TQFP-100
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
2.0 KByte
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
F165L25FHAXT
SAF-C165-L25FHA
SAF-C165-L25FHAINTR
SAF-C165-L25FHATR
SAF-C165-L25FHATR
SAFC165L25FHAXT
SP000012870
SAF-C165-L25FHA
SAF-C165-L25FHAINTR
SAF-C165-L25FHATR
SAF-C165-L25FHATR
SAFC165L25FHAXT
SP000012870
Table 2
Symbol Pin Nr
P6
P6.0
P6.1
P6.2
P6.3
P6.4
P6.5
P6.6
P6.7
P2
P2.8
P2.9
P2.10
P2.11
P2.12
P2.13
P2.14
P2.15
P5
P5.10
P5.11
P5.12
P5.13
P5.14
P5.15
Data Sheet
TQFP
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
2
3
Pin Definitions and Functions (cont’d)
Pin Nr
MQFP
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
2
3
4
5
Input
Outp.
IO
O
O
O
O
O
I
I/O
O
IO
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Function
Port 6 is an 8-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits.
For a pin configured as input, the output driver is put
into high-impedance state. Port 6 outputs can be
configured as push/pull or open drain drivers.
The Port 6 pins also serve for alternate functions:
CS0
CS1
CS2
CS3
CS4
HOLD
HLDA
BREQ
Port 2 is an 8-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits.
For a pin configured as input, the output driver is put
into high-impedance state. Port 2 outputs can be
configured as push/pull or open drain drivers. The
following Port 2 pins serve for alternate functions:
EX0IN
EX1IN
EX2IN
EX3IN
EX4IN
EX5IN
EX6IN
EX7IN
Port 5 is a 6-bit input-only port with Schmitt-Trigger
char. The pins of Port 5 also serve as timer inputs:
T6EUD
T5EUD
T6IN
T5IN
T4EUD
T2EUD
10
Chip Select 0 Output
Chip Select 1 Output
Chip Select 2 Output
Chip Select 3 Output
Chip Select 4 Output
External Master Hold Request Input
Hold Acknowledge Outp.(master mode)
or Input (slave mode)
Bus Request Output
Fast External Interrupt 0 Input
Fast External Interrupt 1 Input
Fast External Interrupt 2 Input
Fast External Interrupt 3 Input
Fast External Interrupt 4 Input
Fast External Interrupt 5 Input
Fast External Interrupt 6 Input
Fast External Interrupt 7 Input
GPT2 Timer T6 Ext. Up/Down Ctrl Input
GPT2 Timer T5 Ext. Up/Down Ctrl Input
GPT2 Timer T6 Count Input
GPT2 Timer T5 Count Input
GPT1 Timer T4 Ext. Up/Down Ctrl Input
GPT1 Timer T2 Ext. Up/Down Ctrl Input
V2.0, 2000-12
C165