SAA-XC866L-1FRA AB Infineon Technologies, SAA-XC866L-1FRA AB Datasheet - Page 59

IC MCU 8BIT 4KB FLASH 38TSSOP

SAA-XC866L-1FRA AB

Manufacturer Part Number
SAA-XC866L-1FRA AB
Description
IC MCU 8BIT 4KB FLASH 38TSSOP
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet

Specifications of SAA-XC866L-1FRA AB

Core Processor
XC800
Core Size
8-Bit
Speed
86MHz
Connectivity
LIN, SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
38-TSSOP
Data Bus Width
8 bit
Data Ram Size
750 B
Interface Type
UART, SSC
Maximum Clock Frequency
26.67 MHz
Number Of Programmable I/os
27
Number Of Timers
3
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
SAA-XC866
Functional Description
3.7
Reset Control
The SAA-XC866 has five types of reset: power-on reset, hardware reset, watchdog timer
reset, power-down wake-up reset, and brownout reset.
When the SAA-XC866 is first powered up, the status of certain pins (see
Table
19) must
be defined to ensure proper start operation of the device. At the end of a reset sequence,
the sampled values are latched to select the desired boot option, which cannot be
modified until the next power-on reset or hardware reset. This guarantees stable
conditions during the normal operation of the device.
In order to power up the system properly, the external reset pin RESET must be asserted
until V
reaches 0.9*V
. The delay of external reset can be realized by an external
DDC
DDC
capacitor at RESET pin. This capacitor value must be selected so that V
reaches
RESET
0.4 V, but not before V
reaches 0.9* V
DDC
DDC.
A typical application example is shown in
Figure
21. V
capacitor value is 300 nF.
DDP
V
capacitor value is 220 nF. The capacitor connected to RESET pin is 100 nF.
DDC
is less than 50 μs once V
Typically, the time taken for V
to reach 0.9*V
DDC
DDC
DDP
reaches 2.3V. Hence, based on the condition that 10% to 90% V
(slew rate) is less
DDP
than 500 μs, the RESET pin should be held low for 500 μs typically. See
Figure
22.
3.3/5V
220nF
e.g. 300nF
VDDC
VSSC
VSSP
VDDP
typ.
RESET
100nF
EVR
30k
XC866
Figure 21
Reset Circuitry
Data Sheet
56
V1.5, 2010-09

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