UPD78F0500MC-5A4-A Renesas Electronics America, UPD78F0500MC-5A4-A Datasheet - Page 53

• Manufacturer Part Number: UPD78F0500MC-5A4-A
• Description: MCU 8BIT FLASH SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500MC-5A4-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
1.7.2 78K0/KC2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
ANI6/P26
Notes 1.
ANI0/P20 to ANI5/P25,
RxD6/P14 (LINSEL)
Note 1
RxD6/P14 (LINSEL)
2
3.
4.
TO00/TI010/P01
INTP6/P140
, ANI7/P27
TI50/TO50/P17
TI51/TO51/P33
INTP1/P30 to
EXSCL0/P62
INTP0/P120
SCK10/P10
INTP4/P33
Available only in the 44-pin and 48-pin products.
Available only in the 48-pin products.
Available only in the products whose flash memory is at least 48 KB.
Available only in the products with on-chip debug function.
INTP5/P16
TOH0/P15
TI000/P00
TOH1/P16
RxD0/P11
RxD6/P14
SO10/P12
SDA0/P61
TxD0/P10
TxD6/P13
SCL0/P60
SI10/P11
AV
Note 1
AV
Note 2
REF
SS
8
4
Serial interface IIC0
16-bit timer/
event counter 00
Watchdog timer
8-bit timer/
event counter 50
8-bit timer/
event counter 51
Serial
interface UART0
Serial
interface CSI10
Serial
interface UART6
Interrupt control
8-bit timer H0
8-bit timer H1
A/D converter
Watch timer
low-speed
oscillator
Internal
LINSEL
high-speed
Internal
78K/0
CPU
core
RAM
V
DD
V
SS
expansion
RAM
memory
Internal
FLMD0
Flash
Note 3
On-chip debug
Clock output
control
Voltage regulator
Power-on-clear/
System control
Reset control
low-voltage
Port 14
Multiplier &
divider
high-speed
Key return
Port 13
indicator
oscillator
Port 12
Internal
Port 0
Port 1
Port 2
Port 3
Port 4
Port 6
Port 7
Note 2
Note 3
Note 2
Note 2
Note 4
5
2
8
8
4
2
4
6
4
CHAPTER 1 OUTLINE
POC/LVI
control
P60 to P63
P70, P71, P72
P73
P120 to P124
P130
KR0/P70, KR1/P71,
KR2/P72
OCD0A
OCD0B
P00, P01
P10 to P17
P20 to P25, P26
P30 to P33
P40
P140
PCL/P140
RESET
X1/P121
X2/EXCLK/P122
XT1/P123
XT2/EXCLKS/P124
REGC
Note 1
Note 1
Note 2
Note 2
Note 4
Note 4
, P74
, P41
Note 1
Note 2
/X1, OCD1A
/X2, OCD1B
, KR3/P73
Note 1
Note 2
Note 1
Note 1
, P75
,
, P27
EXLVI/P120
Note 2
Note 1
Note 4
Note 4
Note 1
/P31
/P32
53